Configuring DSX-1 CBR or E1 CBR Modules
171
Adaptive
(Unstructured ports only)—A non-required network-wide
synchronization technique used to regenerate the input service clock.
Adaptive timing uses a buffer depth indicator at the receiver to adjust the
line rate: the fuller the buffer, the faster the line rate; the emptier the buffer,
the slower the line rate.
Figure 137 illustrates the SRTS and Adaptive timing options.
Figure 137
DSX-1 CBR Timing Options
Idle Timer
—The length of time with no cells present after which the CBR
software shuts off cell transmission and idles the other direction of the virtual
circuit:
5
,
15
,
30
,
45
, or
60
seconds. This parameter pertains only to CBR virtual
circuits on structured data ports for which the virtual circuit mode has been set
to
RS366
. For details about setting the mode for CBR virtual circuits, see “CBR
Module Virtual Circuit Parameters” later in this chapter.
DBA Bits Mask
(Structured Data ports only)—Dynamic bandwidth allocation
bits mask; a numeric code, in the range
1-255
, representing a mask that masks
off bits that are not a portion of the idle code. When a DSX-1/E1 CBR port is
configured as structured data, all virtual circuits in the port use a preselected
DBA Bits Mask
. The decimal number that represents the
DBA Bits Mask
corresponds to an internal 8-bit value. The default
DBA Bits Mask
is
127
.
The
DBA Bits Mask
parameter is designed to accommodate situations in which the
PathBuilder S700 must communicate with equipment that uses non-standard
signalling patterns. In most cases you should leave this parameter set to its default
value.
CRC-4
(E1 CBR only)—Enables or disables Cyclic Redundancy Check 4 (CRC-4)
information. CRC-4 is a framing option that checks for errors in data. It is a
communication check for parity/framing and is used for performance
monitoring in E1 networks. CRC4 can be enabled only in structured and
multi-frame mode.
Admin Status
—Administrative status:
Out of Service
or
In Service
.
DS1
DS1
AAL 1
-5 Hz
Reference Check
Send Difference (-5 Hz)
Reference - 5 Hz
AAL Header
Buffer
Clock
> <
Depends
on Buffer
Adaptive
Synchronous Residual Time Stamp (SRTS)
Summary of Contents for 3C63400-3AC-C - PathBuilder S700 Switch
Page 14: ...xiv CHAPTER SUPPLEMENTARY REGULATORY INFORMATION ...
Page 18: ...4 ABOUT THIS GUIDE ...
Page 28: ...14 CHAPTER 1 SYSTEM DESCRIPTION ...
Page 88: ...74 CHAPTER 3 GETTING STARTED ...
Page 260: ...246 CHAPTER 6 PATHBUILDER S700 DIAGNOSTICS AND PERFORMANCE MONITORING ...
Page 270: ...256 INDEX ...