11.2.2.3
Dead line detection
A simplified diagram for the functionality is found in figure
condition is indicated if both the voltage and the current in one phase is below their
respective setting values
VDLDPU
and
IDLDPU
. If at least one phase is considered to
be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated. If all
three phases are considered to be dead the output DLD3PH is activated
IA
IB
IC
a
b
a<b
a
b
a<b
a
b
a<b
IDLDPU
VA
VB
VC
a
b
a<b
a
b
a<b
a
b
a<b
VDLDPU
OR
AND
AND
AND
AND
AND
AND
AND
AllCurrLow
DeadLineDet1Ph
DLD3PH
DLD1PH
intBlock
Dead Line Detection
ANSI0000035-1-en.vsd
ANSI0000035 V1 EN
Figure 306:
Simplified logic diagram for Dead Line detection part
11.2.2.4
Main logic
A simplified diagram for the functionality is found in figure
supervision function (SDDRFUF) can be switched on or off by the setting parameter
Operation
to
Enabled
or
Disabled
.
For increased flexibility and adaptation to system requirements an operation mode
selector,
OpModeSel
, has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithms. The different
operation modes are:
•
Disabled
; The negative and zero sequence function is disabled
•
V2I2
; Negative sequence is selected
•
V0I0
; Zero sequence is selected
1MRK505222-UUS C
Section 11
Secondary system supervision
607
Technical reference manual
Summary of Contents for Relion 670 series
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