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Logic function blocks
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MOFn and MOLn, n=1-3, have 16 inputs and 16 outputs. Each INPUTm is copied to
the corresponding OUTPUTm, where m presents the serial number of the input and the
output in the block. The MOFn are the first blocks and the MOLn are the last blocks in
the execution order in the slow logic.
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For the AND gates, OR gates, inverters, normal SR (Set-Reset) flip-flops, XOR gates
and MOVE elements no settings exist.
For the normal On/Off delay timers and pulse timers the time delays and pulse lengths
are set from the CAP configuration tool.
Both timers in the same logic block (the one delayed on pick-up and the one delayed on
drop-out) always have a common setting value. Setting values of the pulse length are
independent of one another for all pulse circuits.
For the controllable gates, settable timers, SR flip-flops with/without memory the set-
ting parameters are accessible through the HMI and SMS.
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The configuration of the logics is performed from the CAP configuration tool.
Execution of functions as defined by the configurable logic blocks runs in a fixed se-
quence in two different cycle times, typical 6 ms and 200 ms.
Function 1
Function 2
Function 3
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Fast logic
Slow logic
MOFn
MOVE
MOLn
MOVE
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Fast logic
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Summary of Contents for REO 517
Page 10: ... RQWHQWV ...
Page 16: ...6 Introduction to the application manual KDSWHU QWURGXFWLRQ ...
Page 64: ...54 Blocking of signals during test KDSWHU RPPRQ IXQFWLRQV ...
Page 88: ...78 Scheme communication logic ZCOM KDSWHU LQH LPSHGDQFH ...
Page 146: ...136 Unbalance protection for capacitor banks TOCC KDSWHU XUUHQW ...
Page 166: ...156 Dead line detection DLD KDSWHU 3RZHU V VWHP VXSHUYLVLRQ ...
Page 378: ...368 Monitoring of DC analog measurements KDSWHU 0RQLWRULQJ ...
Page 384: ...374 Pulse counter logic PC KDSWHU 0HWHULQJ ...
Page 412: ...402 Serial communication modules SCM KDSWHU DWD FRPPXQLFDWLRQ ...
Page 440: ...430 LED indication module KDSWHU DUGZDUH PRGXOHV ...