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LIST O F FIGUR ES
III
List of Figures
Figure 1: UniGear Digital and its key components
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Figure 2: IP address setting for rear port(s)
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Figure 3: Network topology setting and its Redundancy mode
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Figure 4: PTP priority setting for Master clock
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Figure 5: PTP priority setting for Slave clock
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Figure 6: IEEE 1588 master clock status
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Figure 7: IEEE 1588 slave clock status
Figure 8: Properties dialogue of discovered Ethernet switch by AFS Finder
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Figure 10: Port configuration dialogue
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Figure 11: PTP Global dialogue
Figure 12: PTP Transparent Clock Global dialogue
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Figure 13: Transparent clock Port dialogue
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Figure 14: Switching VLAN Global dialogue in AFS67x
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Figure 15: Switching Global dialogue in AFS66x
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Figure 16: VLAN Configuration dialogue
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Figure 18: VLAN Configuration dialogue (Port 6 is connected to SCADA)
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Figure 20: Example of HSR Network overview diagram
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Figure 21: Interconnection of protection relays into HSR ring
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Figure 22: Example of PRP network overview diagram
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Figure 23: Interconnection of protection relays into PRP networks
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Figure 24: Example of Plant Structure in PCM600
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Figure 25: GOOSE / SMV alarm is activated on a configurable LED
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Figure 28: Primary test system CPC 100 from Omicron
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Figure 29: Example of a current sensor label
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Figure 30: Current sensor parameters
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Figure 31 Primary test setup for current sensors when busbars are installed
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Figure 33: Example of a current sensor label
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Figure 34: Current sensor parameters
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Figure 37: Example of a current sensor label
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Figure 38: Current sensor parameters
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Figure 39: Test setup for current sensors when busbars are not installed
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Figure 41: Example of a voltage sensor label
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Figure 42: Voltage sensor parameters
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Figure 43: Test setup for voltage sensors installed in the cable compartment
Figure 44: Measurements view, injected phase 1
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Figure 45: Example of a voltage sensor label
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Figure 46: Voltage sensor parameters
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Figure 47: Test setup for voltage sensors installed on busbars
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Figure 48: Measurements view, injected phase 1
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Summary of Contents for UniGear Digital
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