12. Timer 0/1/2/3/4/5
A96G140/A96G148/A96A148 User’s manual
104
12.2.2
16-bit capture mode
It uses an internal/external clock as a clock source. Basically, the 16-bit timer 1 capture mode has the
same function as the 16-bit timer/counter mode, and the interrupt occurs when T1CNTH/T1CNTL is
equal to T1ADRH/T1ADRL. The T1CNTH, T1CNTL values are automatically cleared by a match signal.
It can be cleared by software (T1CC) too.
A timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than
the maximum period of timer. Capture result is loaded into T1BDRH/T1BDRL.
According to EIPOL1 registers setting, the external interrupt EINT11 function is selected. EINT11 pin
must be set as an input port.
A Match
T1CC
T1EN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/64
fx/512
fx/2048
fx/8
fx/1
16-bit Counter
T1CNTH/T1CNTL
16-bit B Data Register
T1BDRH/T1BDRL
Clear
Edge
Detector
T1ECE
EC1
Comparator
16-bit A Data Register
T1ADRH/T1ADRL
T1IFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
A Match
T1CC
Reload
R
EINT11
T1CNTR
T1EN
3
T1CK[2:0]
Clear
EIPOLB[1:0]
FLAG11
(EIFLAG1.2)
INT_ACK
Clear
To interrupt
block
2
T1MS[1:0]
2
T1EN
T1CRH
1
ADDRESS:BBH
INITIAL VALUE : 0000_0000B
–
T1MS1
T1MS0
–
–
–
T1CC
–
0
1
–
–
–
X
T1CK1
T1CRL
X
ADDRESS:BAH
INITIAL VALUE : 0000_0000B
T1CK1
T1CK0
T1IFR
–
T1POL
T1ECE T1CNTR
X
X
X
–
X
X
X
T1EN
Figure 41. 16-bit Capture Mode of Timer 1
