A96G140/A96G148/A96A148 User’s manual
12. Timer 0/1/2/3/4/5
129
T3ADRH (Timer 3 A data High Register): 1002H
7
6
5
4
3
2
1
0
T3ADRH7
T3ADRH6
T3ADRH5
T3ADRH4
T3ADRH3
T3ADRH2
T3ADRH1
T3ADRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T3ADRH[7:0]
T3 A Data High Byte
T3ADRL (Timer 3 A Data Low Register): 1003H
7
6
5
4
3
2
1
0
T3ADRL7
T3ADRL6
T3ADRL5
T3ADRL4
T3ADRL3
T3ADRL2
T3ADRL1
T3ADRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T3ADRL[7:0]
T3 A Data Low Byte
NOTE:
Do not write
“0000H” in the T3ADRH/T3ADRL register when
PPG mode
T3BDRH (Timer 3 B Data High Register): 1004H
7
6
5
4
3
2
1
0
T3BDRH7
T3BDRH6
T3BDRH5
T3BDRH4
T3BDRH3
T3BDRH2
T3BDRH1
T3BDRH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T3BDRH[7:0]
T3 B Data High Byte
T3BDRL (Timer 3 B Data Low Register): 1005H
7
6
5
4
3
2
1
0
T3BDRL7
T3BDRL6
T3BDRL5
T3BDRL4
T3BDRL3
T3BDRL2
T3BDRL1
T3BDRL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: FFH
T3BDRL[7:0]
T3 B Data Low Byte
