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ACCES I/O Products, Inc. 

MADE IN THE USA 

PCIe-ADIO16-16F Family Manual 

 

14 

Rev B3d 

representation. Other than the above, no other warranty, 
expressed or implied, shall apply to any and all such equipment 
furnished or sold by ACCES. 

TERMS AND CONDITIONS 

If a unit is suspected of failure, contact ACCES' Customer Service 
department. Be prepared to give the unit model number, serial 
number, and a description of the failure symptom(s). We may 

suggest some simple tests to confirm the failure. We will assign a 
Return Material Authorization (RMA) number which must appear 
on the outer label of the return package. All units/components 

should be properly packed for handling and returned with freight 
prepaid to the ACCES designated Service Center, and will be 
returned to the customer's/user's site freight prepaid and 
invoiced. 

COVERAGE 

FIRST THREE YEARS: 

Returned unit/part will be repaired and/or 

replaced at ACCES option with no charge for labor or parts not 
excluded by warranty. Warranty commences with equipment 
shipment. 

FOLLOWING YEARS

: Throughout your equipment's lifetime, ACCES 

stands ready to provide on-site or in-plant service at reasonable 
rates similar to those of other manufacturers in the industry. 

EQUIPMENT NOT MANUFACTURED BY ACCES 

Equipment provided but not manufactured by ACCES is warranted 
and will be repaired according to the terms and conditions of the 
respective equipment manufacturer's warranty. 

DISCLAIMER 

The information in this document is provided for reference only. 
ACCES does not assume any liability arising out of the application 
or use of the information or products described herein. This 
document may contain or reference information and products 

protected by copyrights or patents and does not convey any 
license under the patent rights of ACCES, nor the rights of others. 

Summary of Contents for PCIe-ADIO16-16A

Page 1: ...Sio com 10623 Roselle Street 800 326 1649 http accesio com PCIe ADIO16 16F San Diego CA 92121 1506 USA sales accesio com MADE IN THE USA 16 ANALOG INPUT 4 ANALOG OUTPUT 16 DIGITAL I O FOR PCI EXPRESS...

Page 2: ...A D Scan Start mode optimizes inter channel timing High impedance 8 channel input 1 M 32k FIFO plus DMA for efficient robust data streaming 16 Digital I O pins with flexible secondary functions Four 1...

Page 3: ...0 Ch 0 1 35 ADC IN 1 Ch 0 ADAS3022 1 ADC IN 2 Ch 1 3 37 ADC IN 3 Ch 1 ADC IN 4 Ch 2 5 39 ADC IN 5 Ch 2 ADC IN 6 Ch 3 7 41 ADC IN 7 Ch 3 ADC IN 8 Ch 4 9 43 ADC IN 9 Ch 4 ADC IN 10 Ch 5 11 45 ADC IN 11...

Page 4: ...CH0 1 0 Advanced Sequence Acquires Channel 0 using the gain selected via 18 bits 2 0 Conversion starts will automatically cycle through the channels from CH0 through INx2 0 and each channel is acquir...

Page 5: ...ol bit and status 4 W DAC Control DAC LTC2664 Command Register bits 8 W DAC Waveform Divisor DAC Waveform Points second divisor Base Clock DAC Waveform Rate this register C R ADC Base Clock Frequency...

Page 6: ...to their power on reset state see each ADC Register for more details RST BOARD Writing a 1 will reset the entire device to its power on reset state All RST bits are command bits a 1 causes the reset t...

Page 7: ...llion 125MHz but for broadest compatibility software should always read this register during init and always use the read value when calculating what if any divisor to write to the ADC Rate Divisor re...

Page 8: ...19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name RSV AIN 15 GAIN2 0 RSV AIN 14 GAIN2 0 RSV AIN 13 GAIN2 0 RSV AIN 12 GAIN2 0 RSV AIN 11 GAIN2 0 RSV AIN 10 GAIN2 0 RSV AIN 9 GA...

Page 9: ...rol 38 for important information about the Channel bits re Differential operation Diff SET indicates the paired ADC Counts were sampled in Differential mode Refer to ADC Control 38 for important infor...

Page 10: ...5 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Name WDG UNUSED EXT1 EXT0 LDAC FOF FAF DTO DDONE ADCSTART ADCTRIG UNUSED enEXT1 enEXT0 enLDAC enFOF enFAF enDTO enDDONE enADCSTART enADCTRIG Read IRQ Status to determin...

Page 11: ...as a configurable active edge rising or falling SET the corresponding edgeXXX bit to select rising edge CLEAR the bit for falling edge IOGx SET each IOGx bit to configure the digital I O bits in the a...

Page 12: ...ave introduced a new source of latency the kernel userland division Application code runs in userland which must transition to the kernel in order to perform any hardware operation This transition add...

Page 13: ...all applicable EM interference and emission standards However as they are intended for use installed on motherboards and inside the chassis of industrial PCs important care in the selection of PC and...

Page 14: ...and invoiced COVERAGE FIRST THREE YEARS Returned unit part will be repaired and or replaced at ACCES option with no charge for labor or parts not excluded by warranty Warranty commences with equipmen...

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