Manual PCI-WDG-CSM
7
Options
Your card may have one or more options installed as mentioned in the opening paragraph of this
description. The following paragraphs describe these options.
Option 01: Computer Power Monitor
The three computer power supplies (+5V, +12V, and -12V) are monitored. If one or more of those
voltages are more than +6% outside of their nominal values, then two bits of a Status Register indicate
whether there is an overvoltage or an undervoltage. In addition, an interrupt request can be generated.
Option 02: Computer Temperature Monitor
If this option is installed, Option 01 must also be installed. This option monitors ambient temperature
inside the computer chassis. The temperature monitor circuit compares the output of an LM334
temperature sensor with a preset DC voltage level. The output of the circuit can be read at a bit location
of the Status Register and, also, can cause an interrupt request if that temperature exceeds the factory
preset limit (50 °C).
Option 03: Computer Temperature Measurement
This option requires presence of both Option 01 and 02. When this option is included, an onboard 8 bit
A/D converter provides means for a software read of the measured temperature. Resolution is to approx.
0.7 °F.
Option 04: This Option Provides Three Functions as Follows:
Change of State
Differential digital inputs are accepted through pins 17 & 18 (ISOIN0) and pins 19 & 20 (ISOIN1),
are opto-isolated and reported in the Status Register. The change-of-state also generates an IRQ
interrupt request. User must supply current limiting bias resistor in external circuitry (Example:
C5V through a 470 ohm or, connect 24V through a 2.2K ohm resistor to the Anode, with
the Cathode connected to an active low TTL output for control.)
Buzzer
The buzzer is under software control and can be turned on by programming a "write" to Base
A 4 or off by programming a "write" to Base A5 or if enabled, the buzzer will turn
on during watchdog reset.
Opto-Isolated Outputs
This option provides an opto-isolated reset signal at pins 4 and 5 (Isolated Reset Output) of the
DB25 connector. An opto-isolated inverse of the reset signal is also provided across pins 6 and 7
(Isolated NOT Reset Output) of the same connector. User must supply source voltage and load
resistor in external circuitry. (Example: CVCC to the Collector and a 1K ohm resistor
(load) from Ground to the Emitter. This gives you a non-inverting output by tying to the Emitter.
For an inverting output, connect a 1K ohm resistor from the +VCC to the Collector, and the line to
be controlled to the Collector below the load resistor, and ground the emitter.)
Option 05
This option deletes the opto-isolated Reset output capability and replaces it with capability to provide
outputs under computer control. When this option is installed, both of these outputs are computer
controlled. To activate the Opto-Isolated Reset output, a write to base D is required, to
deactivate a read to base aD is required. To activate the Opto-Isolated NOT reset, a write to
base E is required. To deactivate a read to base aE is required. Both of these outputs
are deactivated by a computer reset.
