Major Chips Description
2-35
The chip provides two extra IRQ lines and one programmable chip select for motherboard
Plug-and-Play functions. The interrupt lines can be routed to any of the available ISA interrupts.
The on-chip IDE controller supports two separate IDE connectors for up to four IDE devices
providing an interface for IDE hard disks and CD ROMs. The Ultra 33 specification (that supports
the 33 MB/second transfer rate) has been implemented at this IDE controller. The ATA bus pins
and the buffer (read ahead and posted write) are all dedicated for separate channel to improve the
performance of IDE master.
The M1533 supports Super Green function for Intel and Intel compatible CPUs. It implements SMI
or SCI (System Controller Interrupt) to meet the ACPI specification. It also meets the requirement
for OnNow design initiative. It also features powerful power management for power saving
including On, Standby, Sleeping, SoftOff, and Mechanical Off states. To control the CPU power
consumption, it provides CPU clock control (STPCLKJ). The STPCLKJ can be active (low) or
inactive (high) in turn by throttling control. In addition, the M1533 offers the most flexible system
clock design. It can be programmed to stop the CPU Clock, PCI Clock, the Clock cell, or to reduce
the Clock frequency. The PBSRAM (Pipelined-burst SRAM) doze mode is also supported.
The M1533 is includes a PS/2 keyboard/mouse controller, SMBus, two OpenHCI 1.0a USB ports,
and the dedicated GPIO (General Purpose Input/Output) pins. These components enable the chip
to implement the best green and cost/performance system.
2.2.2.1 Features
•
Provides a bridge between the PCI bus and ISA bus for both Pentium and Pentium Pro
systems
•
PCI interface
•
PCI master and slave interface
•
PCI master and slave initiated termination
•
PCI spec. 2.1 compliant (Delayed Transaction support)
•
Buffers control
•
8-byte bidirectional line buffers for DMA/ISA memory read/write cycles to PCI bus
•
32-bit posted write buffer for PCI memory write and I/O data write (for sound card) to ISA
bus
•
Provides steerable PCI interrupts for PCI device plug-and-play
•
Up to eight PCI interrupt routing
•
Level-to-edge trigger transfer
•
Enhanced DMA controller
•
Provides 7 programmable channels: 4 for 8-bit data size, 3 for 16-bit data size
•
32-bit addressability
•
Provides compatible DMA transfers
•
Provides Type F transfers
•
Interrupt controller
•
Provides 14 interrupt channels
Summary of Contents for 390 Series
Page 15: ...System Introduction 1 3 Figure 1 2 PCB No 96183 1A Mainboard Layout Bottom ...
Page 96: ...2 50 Service Guide 2 3 3 Pin Configuration Figure 2 4 FDC37C67 TQFP Pin Diagram ...
Page 97: ...Major Chips Description 2 51 Figure 2 5 FDC37C67 QFP Pin Diagram ...
Page 102: ...2 56 Service Guide 2 3 6 Block Diagram Figure 2 6 FDC37C67 Block Diagram ...
Page 126: ...2 80 Service Guide 2 5 4 1 Functional Block Diagram Figure 2 10 M38813 Block Diagram ...
Page 128: ...2 82 Service Guide 2 6 2 Pin Diagram Figure 2 11 YMF715 Block Diagram ...
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