Chapter 4
66
03h
Initial Superio_Early _Init switch
04h
Reserved
05h
1. Blank out screen
2. Clear CMOS error flag
06h
Reserved
07h
1. Clear 8042 interface
2. Initialize 8042 self-test
08h
1. Test special keyboard controller for Winbond 977 series Super I/O chips.
2. Enable keyboard interface.
09h
Reserved
0Ah
1. Disable PS/2 mouse interface (optional)
2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional).
3. Reset keyboard for Winbond 977 series Super I/Q chips.
0Bh
Reserved
0Ch
Reserved
0Dh
Reserved
0Eh
Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keep
beeping the speaker.
0Fh
Reserved
10h
Auto detect flash type to load appropriate flash R/W codes into the run time area in F000
for ESCD & DMI support.
11h
Reserved
12h
Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set real-time
clock power status, and then check for override.
13h
Reserved
14h
Program chipset default values into chipset. Chipset default values are MODBINable by
OEM customers.
15h
Reserved
16h
Initial Early_Init_Onboard_Generator switch.
17h
Reserved
18h
Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or
686)
19h
Reserved
1Ah
Reserved
1Bh
Initial interrupts vector table. If no special specified, all H/W interrupts are directed to
SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1Ch
Reserved
1Dh
Initial Early_PM_INIT switch.
1Eh
Reserved
1Fh
Load keyboard matrix (notebook platform)
20h
Reserved
21h
HPM initialization (notebook platform)
22h
Reserved
.
Checkpoint
Description
Summary of Contents for VERITON 7200
Page 7: ...VII Table of Contents ...
Page 16: ...Chapter 1 9 Main Board Layout ...
Page 70: ...63 Chapter 3 ...
Page 88: ...81 Chapter 6 Veriton 7200 Exploded Diagram ...
Page 93: ...Chapter 6 86 ...
Page 96: ...Appendix A 89 ...
Page 106: ...99 Appendix C ...
Page 110: ...103 Index ...