1-
1
4
1-
1
4
1-
1
4
1-
1
4
1-
1
4
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
2.4 Advanced Chipset Features
This section allows you to configure the system based on
the specific features of the installed chipset. This chipset
manages bus speeds and access to system memory resources,
such as DRAM and external cache. It also coordinates
communications of the PCI bus. It must be stated that these
items should never need to be altered. The default settings
have been chosen because they provide the best operating
conditions for your system. The only time you might
consider making any changes would be if you discovered that
data was being lost while using your system.
◎
◎
◎
◎
◎
Figure 4. Advanced Chipset Features
CMOS Setup Utility-Copyright (C) 1984-2001 Award Software
Advanced Chipset Features
SDRAM CAS Latency/Time
3
Item Help
SDRAM Cycle Time Tras/Trc
7/9
SDRAM RAS -to- CAS Delay
3
Menu Level
SDRAM RAS Precharge Time
3
System BIOS Cacheable
Disabled
Video BIOS Cacheable
Disabled
Memory Hole At 15M-16M
Disabled
CPU Latency Timer
Enabled
Delayed Transaction
Enabled
AGP Graphic Aperture Size
64MB
System Memory Frequency
Auto
←→↑↓
: Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit
F1:General Help F5:Previous Values F6:Fail-Safe Defaults
F7:Optimized Defaults