1 -
1
4
1 -
1
4
1 -
1
4
1 -
1
4
1 -
1
4
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
Bhapter 1
B
IOS Set
t
p
2.4 Advanced Chipset Features
This section allows you to configure the system based on
the specific features of the installed chipset. This chipset
manages bus speeds and access to system memory resources,
such as DRAM and external cache. It also coordinates
communications of the PCI bus. It must be stated that these
items should never need to be altered. The default settings
have been chosen because they provide the best operating
conditions for your system. The only time you might
consider making any changes would be if you discovered that
data was being lost while using your system.
◎
◎
◎
◎
◎
Figure 4. Advanced Chipset Features
CMOS Setup Utility-Copyright(C) 1984-2001 Award Software
Advanced Chipset Features
Bank 0/1 DRAM Timing
8/10ns
Item Help
Bank 2/3 DRAM Timing
8/10ns
Bank 4/5 DRAM Timing
8/10ns
DRAM Clock
Host CLK
SDRAM Cycle Length
3
Menu Level
Bank Interleave
Disabled
Memory Hole
Disabled
P2C/C2P Concurrency
Enabled
System BIOS Cacheable
Disabled
Video RAM Cacheable
Disabled
AGP Aperture Size
64M
AGP-4X Mode
Enabled
AGP Driving Control
Auto
AGP Driving Value
DA
AGP Fast Write
Disabled
On Chip USB
Enabled
USB Keyboard Support
Disabled
USB Mouse Support
Disabled
On Chip Sound
Auto
On Chip Modem
Auto
CPU to PCI Write Buffer
Enabled
PCI Dynamic Bursting
Enabled
PCI Master 0 WS Write
Enabled
PCI Delay Transaction
Disabled
PCI #2 Access #1 Retry
Enabled
AGP Master 1WS Write
Disabled
AGP Master 1WS Read
Disabled
←→↑↓
: Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit
F1:General Help F5:Previous Values F6:Fail-Safe Defaults
F7:Optimized Defaults
