SERIES AP440 ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 18 - http://www.acromag.com
- 18 -
www.acromag.com
Table 3.1 Configuration
Registers
Reg.
Num.
D31 D24
D23 D16
D15 D8
D7 D0
0
Device ID
0x7011 AP440-1E-LF
0x7012 AP440-2E-LF
0x7013 AP440-3E-LF
Vendor ID
16D5
1
Status
Command
2
Class Code=118000
Rev ID=00
3
BIST
Header
Latency
Cache
4
64-bit Memory Base Address for Memory Accesses to PCIe
interrupt and I/O registers
4K Space (BAR0)
5:10
Not Used
11
Subsystem ID
0x7011 AP440-1E-LF
0x7012 AP440-2E-LF
0x7013 AP440-3E-LF
Subsystem Vendor ID
16D5
12
Not Used
13,14
Reserved
15
Max_Lat
Min_Gnt
Inter. Pin
Inter. Line
This board is allocated a 4K byte block of memory (BAR0), to access the PCIe
interrupt and I/O registers. The PCIe bus decodes 4K bytes for BAR0 for this
memory space.
The memory space address map for the AP440 is shown in Table 3.2. Note
that the base address for the board (BAR0) in memory space must be added
to the addresses shown to properly access these AP440 registers. Register
accesses as 32, 16, and 8-bit data in memory space are permitted.
This board is addressable in the PCIe memory space to control the
configuration and status monitoring of 32 digital input or event channels.
This board operates in two modes: Standard Mode and Enhanced Mode.
Standard Mode provides digital input voltage monitoring of 32 isolated
signal lines. In Standard Mode, each input line is configured as a simple
input without interrupts. Data is read from (or written to) one of four
groups (ports) as designated by the address and read and write signals.
Enhanced Mode includes the same functionality of Standard Mode, but adds
access to 32 additional event sense inputs connected to each input point of
ports 0-3. Individual inputs also include selectable hardware debounce in
Enhanced Mode. For event sensing, the Enhanced Mode allows a specific
input level transition (High-to-Low, Low-to-High, or Change-of-State) to be
