IP482 Industrial I/O Pack User’s Manual Counter Timer Module
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In order to determine the necessary Counter Constant values first
calculate the period of the selected clock (internal or external). The period
is calculated by taking the inverse of the clock frequency. In this case,
1/200KHz is equal to 5
s. Then take the total time for the low portion of the
pulse and divide it by the clock period. For this example, 20
s/5
s is equal
to 4. Convert this value to Hex and the result is the total count that is placed
in the appropriate Counter Constant Register. Since it has been stipulated
that the pulse is active high, 4H is written to the Counter 9 Constant A
Register, which contains the value for the non-active (low) portion of the
pulse. The same procedure is used to calculate the Constant B value.
Take the total period of the high portion of the pulse and divide it by the
period of the clock. For this example 5
s/5
s is equal to 1. Converting to
hex, 1H is written to Counter 9 Constant B Register since it contains the
active (high) portion of the pulse.
4. The following is a waveform diagram of this example.
i
i
i
i
Output
InB
InC
InA
Interrupts
The Gate-Off signal (InA) is used as a pause mechanism. The counter
register and output remain constant while the Gate-Off signal is active. In
this example, this occurs when InA is logic low.
Note that the InA and InC inputs run off the internal 8MHz (or 32MHz)
clock. Those signals may not be synchronous with the selected clock. For
further information, see the One-Shot Pulse Mode description.
PROGRAMMING
EXAMPLES
Figure 3.9:
One-Shot Pulse
waveform
In the figure each “i”
represents an interrupt
