ADAM CPU 821x
Chapter 3 Deployment of the CPU 821x
ADAM 8000 Manual CPU 821x – Rev 1.1
3-1
Chapter 3
Deployment of the CPU 821x
This chapter describes the deployment of the CPU 821x together with the
peripheral modules of the System 82xx.
Besides commissioning and start-up behavior you will find here also a
description of the project engineering, parameterization, operating modes
and test functions.
This information also basically applies to the deployment of a bus resp.
NET-CPU (CPU 821xDP, CPU 821xNET…).
More detailed information about the deployment of the bus resp. NET-
CPUs is to find in the concerning chapters of this manual.
The following section contains a description of:
•
Assembly and commissioning
•
Principle of address allocation
•
Project engineering and parameterization
•
Deployment of MPI and MMC
•
Operating modes and overall reset
•
Usage of test functions
Topic
Page
Chapter 3 Deployment of the CPU 821x ............................................... 3-1
Start-up behavior ................................................................................... 3-2
Address allocation ................................................................................. 3-3
Preparations required for configuration ................................................. 3-5
Configuration of directly installed System 82xx modules....................... 3-6
Configuration of the CPU parameters.................................................... 3-8
Project transfer .................................................................................... 3-10
Operating modes ................................................................................. 3-13
Overall Reset....................................................................................... 3-14
Assembly ............................................................................................. 3-16
Recalling version and performance information .................................. 3-17
Using test functions for the control and monitoring of variables .......... 3-18
Note!
This information is valid for all the CPUs described in this manual since the
backplane bus communication between the CPU and the peripheral
modules is the same for all models of this CPU!
Outline
Contents