Registers
29
Freq_Sel:
1: Frequency of A/D clock source is higher than PCI clock
frequency (33 MHz)
0: Frequency of A/D clock source is lower than PCI clock
frequency (33 MHz)
4.12 High Level Programming
To operate, the PCI-9812/10 card can be controlled directly via the
high-level Application-Programming-Interface (API), hence
bypassing the detailed register structures. The software Libraries,
including DOS Library for Borland C++ and DLL driver for Win-95,
are included in the ADLINK CD. For further information, please
refer to Chapter 6 “C/C++ Software Library”.
4.13 Low Level Programming
Users are not required to write any hardware dependent low-level
programs to operate PCI-9812/10. Because it is more complex to
control the PCI controller and the information is not described in
this manual, ADLINK does not recommend its users to program its
applications based on low-level programming. The PCI controller
used in the PCI-9812 is AMCC-S5933. For further information on
the s5933 PCI controller, please visit www.amcc.com.
CLKSRC2
CLKSRC1
Selected clock source
0
0
Internal clock (40 MHz)
0
1
External sine wave clock
1
0
External digital clock
1
1
Illegal
Note:
When external clock is selected, this external clock is
also divided by the frequency divider as previously
mentioned, hence the frequency of the external clock
should be at least twice as the desired sampling fre-
quency.
Summary of Contents for NuDAQ PCI-9810
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