28
Registers
4.10 Acquisition Enable Register
The register enables or disables the ADC acquisition.
Address:
BASE + 1ch
Attribute:
write only
Data Format:
Bit 31..1 -- don't care
Bit 0 -- ACQEN, acquisition enable
When a "1" is written to this bit, the PCI-9812/10 is ready to
sample data. When a "0" is written, the PCI-9812/10 is disabled.
4.11 Clock Source Register
The register is used to select the system clock source.
Address:
BASE + 20h
Attribute:
write only
Data Format:
Bit 31..3 -- Any value
Bit 2..1 -- CLKSRC1..0, ADC clock source
Bit 0: --- Freq_Sel, Frequency selection.
Bit
7
6
5
4
3
2
1
0
BASE+18h
---
---
---
---
---
---
---
ACQEN
BASE+19h
---
---
---
---
---
---
---
---
BASE+1Ah
---
---
---
---
---
---
---
---
BASE+1Bh
---
---
---
---
---
---
---
---
Bit
7
6
5
4
3
2
1
0
BASE+18h
---
---
---
---
---
CLKSRC1 CLKSRC0 Freq_Sel
BASE+19h
---
---
---
---
---
---
---
---
BASE+1Ah
---
---
---
---
---
---
---
---
BASE+1Bh
---
---
---
---
---
---
---
---
Summary of Contents for NuDAQ PCI-9810
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