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Operation Theory
For one channel applications, only channel 0 can be selected with
the total FIFO length being 32K samples. For simultaneous two-
channel applications, use channel 0 and channel 1 to optimize the
FIFO usage. The onboard circuit does not allow the user to use
channel 0 and 2 or channel 2 and 3 simultaneously. Please note
for simultaneous sampling applications, the hardware only
supports 2 or 4 channels but not 3-channel data acquisitions.
Total Data Throughput
When four channels start simultaneously, the total data throughput
from the AD converter to the onboard FIFO memory would be:
Sampling Rate x number of channels x 2 bytes/channel
Therefore, the maximum total data throughput is 160M bytes /sec.
160MB/s = 20MHz x 4 channels x 2 bytes/channel
This extremely high data rate is beyond the 32bit/33MHz PCI-bus
bandwidth. Therefore, two 16K words (samples) FIFO are
designed for buffering the data.
There is a total of 32K word (32K samples) when FIFO is onboard.
When four channels are used, the FIFO size is 8K samples per
channel. When only two channels (#0 and #1) are used, the FIFO
size is 16K samples per channel. When only channel 0 is used,
the FIFO size is 32K samples.
Users would need to calculate the total data throughput for their
applications, as this value would be related to the total data length
that can be continuously acquired.
Maximum Acquiring Data Length
The burst PCI bandwidth is 132MB/sec. However, the effective
sustained data rate is usually less than 100MB/s. This value may
be lower when many PCI add-on devices are used simultaneously.
If the total AD data throughput is lower than the PCI bandwidth,
the AD data can be put into the host memory through Bus-
mastering DMA, and the total acquiring data length could be up-to
64MB (32M samples) which is the maximum of the PCI controller.
If the total AD data throughput is higher than the PCI bandwidth,
Summary of Contents for NuDAQ PCI-9810
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