ADLINK Technology PCIe-9842, User Manual

Page 1: ...Advance Technologies Automate the World Manual Rev 2 00 Revision Date February 13 2011 Part No 50 11040 1000 PCIe 9842 200 MS s 14 Bit 1 CH High Speed PCI Express Digitizer User s Manual ...

Page 2: ... or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copy right All rights are reserved No part of this manual may be repro duced by any mechanical electronic or other means in any form without prior written permission of the manufacturer Trademarks NuDAQ NuIPC DAQBench are registered tradem...

Page 3: ...chnology China Co Ltd Address Ϟ Ꮦ ϰᮄऎᓴ 催 ᡔುऎ㢇 䏃 300 ো 201203 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 China Tel 86 21 5132 8988 Fax 86 21 5132 3588 Email market adlinktech com ADLINK Technology Beijing Address ҀᏖ ऎϞഄϰ䏃 1 োⲜ ࡼ ॺ E ᑻ 801 ᅸ 100085 Rm 801 Power Creative E No 1 B D Shang Di East Rd Beijing 100085 China Tel 86 10 5885 8666 Fax 86 10 5885 8625 Email market...

Page 4: ...pan Tel 81 3 4455 3722 Fax 81 3 5333 6040 Email japan adlinktech com ADLINK Technology Inc Korean Liaison Office Address 昢殾柢 昢爎割 昢爎壟 1506 25 穢壊 B D 2 猻 2F Hando B D 1506 25 Seocho Dong Seocho Gu Seoul 137 070 Korea Tel 82 2 2057 0565 Fax 82 2 2057 0563 Email korea adlinktech com ADLINK Technology Singapore Pte Ltd Address 84 Genting Lane 07 02A Cityneon Design Centre Singapore 349584 Tel 65 6844 2...

Page 5: ...8 Driver Information 8 WD DASK 9 DAQPilot 9 DAQMaster 11 2 Getting Started 13 2 1 Installation Environment 13 2 2 Package Contents 14 2 3 Device Layout and I O Connectors 15 2 4 Installing the Module 18 3 Operation Theory 19 3 1 Functional Block Diagram 19 3 2 Basic AI Acquisition 20 Analog Input Path 20 Basic Acquisition Timing 21 AI Data Format 23 Synchronous Digital Input 24 3 3 Trigger Sources...

Page 6: ...f Contents Post Trigger or Delay Trigger Acquisition with Re Trigger 28 3 5 Data Transfers 29 3 6 AUX DIO 31 4 Calibrations 33 4 1 Calibration Constant 33 4 2 Auto Calibration 34 Important Safety Instructions 35 ...

Page 7: ...e 1 1 Analog Input 3 Table 1 2 Timebase 3 Table 1 3 Triggers 4 Table 1 4 Aux Digital I O 5 Table 1 5 Data Memory 6 Table 1 6 Onboard Reference 6 Table 1 7 General Information 7 Table 2 1 Connector Types 16 Table 2 2 Auxiliary Digital I O 17 ...

Page 8: ...nput Signal Path 20 Figure 3 3 Basic Acquisition Timing of Digitizer 21 Figure 3 4 Different Sampling Rate by Setting Different Scan Interval Counters 22 Figure 3 5 Synchronous Digital Input Operations 24 Figure 3 6 External Digital Trigger Polarity and Pulse Width Requirement 25 Figure 3 7 Post Trigger Mode Operation 26 Figure 3 8 Delay Trigger Mode Operation 27 Figure 3 9 Re Trigger Mode Operati...

Page 9: ...ferred in real time PCIe 9842 is designed on the PCI Express x4 bus as the interface When signal is converted from analog to digital data data will be transferred to host system memory continuously due to PCI Express high bandwidth features The auto calibration function of the PCIe 9842 is performed with onboard reference circuit that calibrates the offset and gain errors of analog input Once the ...

Page 10: ...put High speed PCI Express x4 bus interface Scatter Gather DMA data transfer for high speed data streaming Supports one external digital trigger input Digital trigger output to stimulus external instrument Supports auto calibration 1 2 Applications Radar signal acquisition IF signal spectrum monitoring Optical fiber test Physics experiment and science research Cable fault location and partial disc...

Page 11: ...t Coupling DC Input Signal Range 1 0 V Overvoltage Protection 5 V ADC Resolution 14 bits 1 in 16 384 Offset Error 1 mV Gain Error 0 5 of input 3 dB Bandwidth 100MHz Table 1 1 Analog Input Specification Value Sample Clock Source Internal onboard clock oscillator Time base Frequency 200 MHz Sampling Rate Range 200 MS s 3051 75 S s Internal Timebase Accuracy 25 ppm Table 1 2 Timebase ...

Page 12: ...ximum Input Overload 0 5 V to 5 5 V Input Impedance 50 Ω Trigger Condition Rising edge or Falling edge software programmable Minimum Pulse Width 20 ns Digital Trigger Output Compatibility 5 V TTL Output High Threshold VOH 2 4 V Output Low Threshold VOL 0 2 V Trigger Output Polarity Positive or Negative Software programmable Trigger Output Pulse Width 50ns 100ns 150ns 200ns 500ns 1us 2us 7 5us and ...

Page 13: ...2V maximum Output Driving Capability 12 mA Aux DIO Function as Static IO Number of Channel 8 bit Direction selection Each bit can be programmed as input or output channels Data Transfer Polling access through spe cific registers Aux DIO Function as Synchronized Digital Input SDI Number of Input Channels 2 bit Data Transfer DMA 2 SDI bits and ADC data are combined into one register and transferred ...

Page 14: ...pecification Value Onboard Memory 16K samples Data Transfer Type Scatter gather DMA transfer Table 1 5 Data Memory Specification Value Recommend Warm Up Time 15 minutes Reference Voltage 5 000 V Reference Temp Coeff ppm C 5 0 ppm C Table 1 6 Onboard Reference ...

Page 15: ... including connector PCI E Standard PCI Express short length card 106 7 mm H X 174 6 mm W Bus Interface Bus Type PCI Express x4 Certification FCC FCC 47 CFR Part 15 Subpart B ICES 003 Issue 4 ANSI C63 4 2003 CE EMC EN55022 EN61000 3 2 EN61000 3 3 EN55024 IEC 61000 4 2 IEC 61000 4 3 IEC 61000 4 4 IEC 61000 4 5 IEC 61000 4 6 IEC 61000 4 8 IEC 61000 4 11 Power Requirements Power rails Standby Current...

Page 16: ...vers for other application envi ronment such as LabVIEW and MATLAB ADLINK also pro vides ActiveX component ware for measurement and breakthrough proprietary software applications All software options are included in the ADLINK All in One CD Supported Operating System Windows 7 Vista XP Linux Recommended Application Environments VB NET VC NET VB VC BCB Driver Support DAQPilot for Windows DAQPilot f...

Page 17: ...SK user s and function refer ence manuals are in the ADLINK All in One CD Manual Soft ware Package WD DASK 1 4 3 DAQPilot DAQPilot is a driver and SDK with a graphics driven interface for various application development environments DAQPilot comes as ADLINK s commitment to provide full support to its comprehen sive line of data acquisition products and is designed for the nov ice to the most exper...

Page 18: ...10 Introduction Figure 1 2 DAQPilot You can download and install DAQPilot at http www adlinktech com TM DAQPilot html ...

Page 19: ...ivers all in one configurations and pro vides you with a full support matrix to properly and conveniently configure ADLINK Test and Measurement products As a configuration based device manager for ADLINK DAQ cards DAQMaster enables you to manage ADLINK devices and inter faces install and upgrade software applications and manage ADLINK DAQPilot tasks Figure 1 3 DAQMaster ...

Page 20: ...12 Introduction ...

Page 21: ...and easily misplaced Recommended Installation Tools Phillips cross head screwdriver Flat head screwdriver Anti static Wrist Strap Anti static mat The ADLINK PCIe 9842 digitizer cards are electro static sensitive equipment that can be easily damaged by static electricity The equipment must be handled on a grounded anti static mat The operator must wear an anti static wristband grounded at the same ...

Page 22: ...se items are missing or damaged contact the dealer from whom you purchased the product Save the shipping materi als and carton in case you want to ship or store the product in the future Warning DO NOT install or apply power to equipment that is dam aged or if there is missing incomplete equipment Retain the shipping carton and packing materials for inspection Please contact your ADLINK dealer ven...

Page 23: ...Getting Started 15 2 3 Device Layout and I O Connectors Figure 2 1 PCIe 9842 Mechanical Dimensions units in mm Connectors for AUX DIO ...

Page 24: ... Input channel CH0 SMA Screw type Analog input channel Ext Digital Trigger Input TRG IN External digital trigger input This channel receives trigger signal from external instrument and initial an acquisition proce dure Trigger Out put TRG OUT Trigger output Every time an acquisition begins a pulse syn chronized with timebase clock will assert and send output through this connector The pulse width ...

Page 25: ...ronized DI For more detail operation of AUX DIO func tion please refer to Section 3 The following table depicts the pin define of this connector Legend Pin Pin Legend DIO0 SDI0 1 2 GND DIO1 SDI1 3 4 GND DIO2 5 6 GND DIO3 7 8 GND DIO4 9 10 GND DIO5 11 12 GND DIO6 13 14 GND DIO7 15 16 GND Table 2 2 Auxiliary Digital I O 1 2 3 4 5 7 9 11 13 15 6 8 10 12 14 16 ...

Page 26: ... 3 Select the PCI slot that you intend to use then remove the bracket opposite the slot if any 4 Align the card connectors golden fingers with the slot then press the card firmly until the card is completely seated on the slot 5 Secure the card to the chassis with a screw 6 Replace the system chassis cover 7 Connect the power plug to a power source then turn on the system chassis ...

Page 27: ... trigger modes and data transfer 3 1 Functional Block Diagram Figure 3 1 PCIe 9842 Block Diagram ADC Analog Input Path FIFO PCI Express Controller Reference Calibration Onboard Clock PCI Express Bus PCI Express X 4 CH0 TRG IN TRG OUT High Speed B to B Interface FPGA Trigger Decision ADC Interface Local Bus Interface Buffer Buffer Aux DIO Port Daughter Board Carrier Board ...

Page 28: ...which is higher than 100 MHz The 14 bit ADC pro vides not only accurate DC performance but also high signal to noise ratio high spurious free dynamic range in AC performance At last the ADC data transfer to system memory via the high speed PCI Express x4 interface When perform auto calibration an internal calibration provide sta ble and accurate reference voltage to AI for calibration Figure 3 2 A...

Page 29: ...ugh the DMA engine The sampled data is generated continu ously at the rising edge of Timebase according to the scan interval counter setting While sampled data reaches customer specified number in this example is 256 the acquisition ends Figure 3 3 Basic Acquisition Timing of Digitizer To achieve different sampling rate other than 200MS s user can specify a number for scan interval counter For exa...

Page 30: ...data to be acquired trigDelayTicks 16 bit 1 65536 Delay Trigger Counter The delay trigger counter is used to indicate the time between a trigger event and the start of an acquisition The unit of a delay count is the period of the Timebase ReTrgCnt 31 bit 1 2147483648 Re Trigger Counter The digitizer can enable re trigger to accept multiple triggers Refer to sec tion 3 5 3 for more detail TIMEBASE ...

Page 31: ...SDI enabled or disabled A D data format with SDI Enabled D15 D14 D13 D12 D3 D2 D1 D0 D15 D2 bits represent the data from ADC 2 s complement D1 D0 bits represent the status of SDI0 SDI1 respectively A D data format with SDI Disabled D15 D14 D13 D12 D3 D2 D1 D0 D15 D2 bits represent the data form ADC 2 s complement D1 D0 bits should be truncated Description Analog Input Range Digital Code HEX Full S...

Page 32: ...0 Mbit s when using internal 200 MS s Timebase clock These two digital input lines are combined with ADC data and located in 2 LSB when SDI function is enabled Please refer to Figure 3 5 for more details Figure 3 5 Synchronous Digital Input Operations Note When the SDI function is enabled the remaining DIO ports DIO2 7 are invalid Amplifier Circuitry CLK ADC D Flip Flop Data SDI0 Analog Input SDI0...

Page 33: ... specific API func tion Please refer to WD DASK function reference manual for more detail operation An external digital trigger occurs when a TTL rising edge or a fall ing edge is detected at the SMA connector TRG IN on the front panel As illustrated in following figure the trigger polarity can be selected by software Note that the signal level of the external dig ital trigger signal should be TTL...

Page 34: ...l 3 4 1 Post Trigger Acquisition Use post trigger acquisition when you want to collect data after the trigger event as illustrated in Figure 3 7 When the operation starts PCIe 9842 waits for a trigger event Once it receives the trigger signal the acquisition begins Data generates from ADC and being transferred to system memory continuously The acqui sition stops once when the total data amount rea...

Page 35: ...t as illustrated in Figure 3 8 When PCIe 9842 receives trigger event it waits a certain delay time and then begins acquisition The delay time is specified by a 16 bit counter value so that the maximum delay time is the period of TIMEBASE X 216 1 while the minimum delay is the period of Timebase Figure 3 8 Delay Trigger Mode Operation ...

Page 36: ... trigger events as illustrated in Figure 3 9 You can program the number of triggers then the digitizer will acquire a specific sample data each time a trigger is accepted Thus the time between last sampled data and next trigger event can be only one clock period of Timebase After the initial setup the process does not require software intervention Figure 3 9 Re Trigger Mode Operation ...

Page 37: ... between other devices in the sys tem and other components in the system For example data trans fer between digitizers and host memory usually travel through a PCIe switch before transferring to host system All digitizers share the bandwidth available on the link between PCIe switch and the host system To provide efficient data transfer a PCI bus mastering DMA is essential for continuous data stre...

Page 38: ...limitation on DMA data transfer size except the physical storage capacity of your system Users can also link descriptor nodes circularly to achieve a multi buffered DMA Figure 3 10 illustrates a linked list that is comprised of three DMA descriptors Each descriptor contains a PCI address PCI dual address a transfer size and the pointer to the next descriptor PCI address and PCI dual address suppor...

Page 39: ... digital IO is polling Synchronous digital input SDI When configured as synchronous digital input there are only two digital input lines available These two digital input lines can be sampled synchronously with Timebase clock for mixed signal applications Thus the data transfer can up to 200Mbit s when using maximum sampling rate These two digital input lines are combined with analog input channel...

Page 40: ...32 Operation Theory ...

Page 41: ...lt bank records the factory calibrated constants Bank 0 is written protec tion that prevents any abnormal auto calibration process occurred in user s environment The banks 1 2 and 3 which are user defined spaces provided for user s self calibration constants When user executes the auto calibration process the calibration constants will be recorded to bank 1 2 and 3 based on user assignment When th...

Page 42: ... without external signal connec tions reference voltages or measurement devices The PCIe 9842 has an on board calibration reference to ensure the accuracy of auto calibration The reference voltage is mea sured on the production line and recorded in the on board EEPROM Before user begins the auto calibration procedure it is recommended to warm up the PCIe 9842 for at least 15 minutes Please remove ...

Page 43: ...nd unplug any power cords cables To avoid electrical shock and or damage to equipment Keep equipment away from water or liquid sources Keep equipment away from high heat or high humidity Keep equipment properly ventilated do not block or cover ventilation openings Make sure to use recommended voltage and power source settings Always install and operate equipment near an easily accessible electrica...

Page 44: ...ized technicians when The power cord or plug is damaged Liquid has penetrated the equipment It has been exposed to high humidity moisture It is not functioning or does not function according to the user s manual It has been dropped and or damaged and or It has an obvious sign of breakage CAUTION RISK OF EXPLOSION IF BATTERY IS REPLACED BY AN INCORECT TYPE DISPOSE OF USED BATTERIES ACCORDING TO THE...