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Appendix C. Waveform of Counter Mode
The MIC-3756 offers 1 counter function to fulfill your industrial or
laboratory applications. This chapter will describe each counter mode
in detail with the waveform diagram.
Counter Mode without Gate Control
In this mode, the gate input does not affect counter operation. Once
started, the counter will count to TC repetitively. On each TC the
counter will reload the initial value from the counter set value register
(Base Add. + 18h); hence the value in the set value register determines
the time between TCs. The counter output mode may be obtained with
the TC output mode or the TC Toggled output mode by specifying in
the Counter Mode register (CM5, CM4); Toggled output uses the
trailing edge of TC to toggle a flip -flop to generate an output level
instead of a pulse. During the TC Toggled output mode, once the output
toggled, it will hold high output level and ignore the following TCs
until users clear the Toggled output by writing the Bit1of Count Reset
Register (Base Add. + Eh ). If Bit0 of the Count Reset Register is
Logic“1”, write logic“0” into the Bit1 of Count Reset Register, users
can clear the Toggle output.
Summary of Contents for MIC-3756
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Page 7: ...1 Introduction 1 CHAPTER ...
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Page 13: ...7 Hardware Configuration CHAPTER 2 ...
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Page 20: ...14 2 3 Board Layout Fig 2 1 MIC 3756 board layout ...
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Page 23: ...17 Pin Assignment and Jumper Setting CHAPTER 3 ...
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Page 26: ...20 Fig 3 1 I O Connector pin assignments for the MIC 3756 ...
Page 33: ...27 Operations CHAPTER 4 ...
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Page 56: ...50 Note Write 1 to the bit Fn in Interrupt Control Register clears the interrupt ...