PCI-1243U User Manual
48
4.3.3 Register Select Command
Register select code: Selecting an access register with last 3 bits.
Preset Counter Operation Control:
When this bit is 1, the preset counter will stop counting. When this bit is
0, the preset counter will decrement by one for each pulse output.
Ramping-down Point Interrupt Control:
This bit controls whether or not the INT signal is output when the ramp-
ing-down point is reached. When this bit is 1 and the preset counter value
becomes smaller than the ramping-down point setting in R5, it will output
an INT signal. To reset the INT signal, set this bit to 0. If you want to
mask this operation, leave this bit set to 0. The INT terminal output is the
result of an logical OR of this signal with the interrupt signal when
stopped. To determine which source has caused the INT signal to be out-
put, check Status0.
1
0
7
6
5
4
3
2
1
0
Register Selection
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
R0: Preset Counter Data
R1: FL register
R2: FH register
R3: Acceleration/deceleration rate register
R4: Multiplier register
R5: Ramping-down point register
R6: Set idling pulse
R7: Output type register
Preset counter operation control
0 Counts output pulse
1 Do not count
Ramping-down point interrupt control
0 Ramping-down reset
1 Ramping-down interrupt enable
Interrupt output when external start is enabled
:
0
:
Interrupt is not output (reset)
1
:
Interrupt is enabled
Summary of Contents for PCI-1243U
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Page 8: ...PCI 1243U User Manual viii ...
Page 14: ...PCI 1243U User Manual 6 ...
Page 35: ...27 Chapter3 Figure 3 8 Point to Point Movement ...
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Page 80: ...PCI 1243U User Manual 72 Appendix A Diagrams A 1 Jumper and Switch Layout ...
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