PCI-1751U User Manual
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Setting jumper JP1 sets the clock source of Timer 0 to be external, and
this allows Timer 0 and Timer 1 to be cascaded into a 32-bit event
counter.
3.3.3 Counter 2
Counter 2 can be a 16-bit timer or an event counter, selectable by setting
JP3. When the clock source is set for an internal source, Counter 2 is a
16-bit timer; when set as an external source, then Counter 2 is an event
counter. Counter 2 is set as mode 0 (interrupt on terminal count) in the
driver provided by Advantech.
3.3.4 Timer/Counter Frequency and Interrupt
The input clock frequency of the counter/timers is 10 MHz. The output of
both Timer 1 and Counter 2 can generate interrupts for the system (refer
to section 3.3). The maximum and minimum timer interrupt frequency is
(10 MHz)/(2)=(5 MHz) and (10 MHz)/(65535*65535)=0.002328 Hz,
respectively.
The gates of the counter/timers are internally pulled to +5 V when gate
control is enabled, but a user can also set it using the connector pins
(CNT0_G, CNT1_G and CNT2_G).
Summary of Contents for PCI-1751U
Page 1: ...PCI 1751U 48 bit Digital Input Output Card with Universal PCI Bus User Manual ...
Page 5: ...2 CHAPTER 1 General Information ...
Page 9: ...2 CHAPTER 2 Installation ...
Page 15: ...11 Chapter2 2 5 PCI 1751U Block Diagram Figure 2 2 PCI 1751U Block Diagram ...
Page 18: ...PCI 1751U User Manual 14 ...
Page 19: ...2 CHAPTER 3 Operation ...
Page 28: ...PCI 1751U User Manual 24 ...
Page 29: ...2 APPENDIX A Function of 8254 Counter Chip ...