MAINTENANCE MANUAL
IFR 4000
2-2-1
Page 5
Aug 1/04
B. Multi-Function PCB Assy
The Multi-Function PCB Assy contains all of the application specific hardware for the Test
Set. The circuitry on the Multi-Function PCB Assy provides for level and frequency control
of the RF system, tone generation, keypad interface and control for the LCD and backlight.
The Multi-Function PCB Assy also contains the USB controller and the level translator for
the system RS-232 Connector. The REMOTE Connector provides for software upgrades and
remote operation of the Test Set.
(1) Bus
Interface
The Bus Interface communicates with the Processor PCB Assy and consists of address
lines A0-A23, data lines D0-D31, R/W, /Reset, CPU Clock, DMA, Timer, Interrupt, I
2
C
bus and chip selects. The address, data, reset, clock and chip selects are buffered.
Most of the DMA, timer, interrupt and I
2
C type signals are not. The data bus buffer
enable and direction is controlled via the CPLD on the Processor PCB A ssy.
(2) FPGA
The version register is a 16-bit device that contains the version for the FPGA F/W.
The status register is an 16-bit read-only device contained within the FPGA. The
control register is a 16-bit write-only device contained within the FPGA.
The FPGA on the Multi-Function PCB Assy supports several types of programming
methods, Slave Serial, Master Serial, Slave Parallel and Boundary Scan mode. In
Master Serial, a local serial PROM provides the configuration data. In Slave Parallel
mode, the Processor PCB Assy provides the configuration data
Keypad
The keypad register provides the current status of the keypad. If a key is pressed, the
corresponding row/column lines are driven high. Multiple keys can be pressed and are
represented as an OR condition on the data inputs.
Speaker
The Multi-Function PCB Assy contains a speaker that is used for audible keypad
“chirps,” RF input overload warnings, autopilot position updates, etc. The speaker is
driven by the FPGA with a 3.3 V, 4 kHz square wave signal. The 4 kHz square wave
signal is enabled by writing a 16-bit value to the Speaker Pulse Generator Register.
Setting bit 15 (the MSB) high enables the speaker continuously. The register can be
written to at any time. Writing a larger value to the register while the tone is in
process extends the tone. Writing a smaller value to the register terminates the tone
sooner.
LCD Backlight / Contrast Control
The LCD backlight and contrast are controlled by a DAC. Output 11 is used for
contrast adjustment and output 12 is used for backlight adjustment. The DAC is a
serial device and is loaded with a 16-bit data word with serial bus AG1.
Summary of Contents for IFR 4000
Page 1: ...NAV COMM Test Set Maintenance Manual 1002 5600 4P0 IFR 4000...
Page 3: ...MAINTENANCE MANUAL IFR 4000 FOR QUALIFIED SERVICE PERSONNEL ONLY...
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