MAINTENANCE MANUAL
IFR 4000
2-2-1
Page 11
Aug 1/04
D. RF Assy
The RF Assy consists of the RF Controller PCB Assy and the RF Converter PCB Assy
enclosed in a block. The RF Assy receives power and control via the Multi-Function PCB
Assy.
The RF Converter PCB Assy contains the RF termination for the direct connect port (RF I/O
Connector), the power amplifier, ANT (Antenna) Connector and the VSWR bridge to support
the SWR Connector, as well as the frequency translation circuitry and step attenuator. The
RF Controller PCB Assy interfaces directly with the Multi-Function PCB Assy to control the
RF hardware. The RF Controller PCB Assy also contains the RF synthesizers and the
modulation driver circuitry.
The RF Assy generates the modulated RF output signals that are used to test the UUT. The
converter also down-converts the received signal, demodulates the FM and provides a
frequency counter for the incoming signal.
A 40 MHz TCXO with 1 ppm stability provides the reference signal for the RF A ssy as well
as the Multi-Function PCB Assy. The 40 MHz reference provides the clock si gnal for the
Direct Digital Synthesizer (DDS). The DDS generates a nominal 10.7 MHz signal that
provides the Phase Lock Loop (PLL) reference in the IF synthesizer. Using the DDS as the
PLL reference, very fine frequency steps can be achieved while keeping the division ratio
(N) of the PLL low, which keeps the phase noise of the synthesizer low. The serial data
bus from the Multi-Function PCB Assy controls both the DDS and the PLL.
The IF synthesizer PLL provides a 450.1 to 450.6 MHz IF for the generate function and the
LO used for the final down-conversion when the system is set to receive. The IF signal is
passed through an attenuator, amplifier and low-pass filter to provide isolation and to
remove spurious signals and harmonics. The signal is then steered to the AM modulator
circuit by the RF switch.
The AM modulator (a PI configuration PIN diode attenuator) provides the AM modulation
and the fine increment output level adjustment and output leveling functions. The level
control inputs as serial data to a DAC, while the baseband AM is provided by the audio
circuit on the Multi-Function PCB Assy; these signals are summed with the leveling detector
output to control the AM modulator.
The modulated IF signal is amplified and passed through a bandpass filter via another RF
switch to a mixer. The 450 MHz IF is mixed with a 525 to 850 MHz LO to set the output
frequency of 75 to 400 MHz. The LO signal is generated in the LO PLL synthesizer which is
controled via the serial bus from the Multi-Function PCB Assy. The 40 MHz TCXO is
divided by 4 to provide a 10 MHz reference to the PLL, which generates a 525 to 850 MHz
output in 0.5 MHz steps. The PLL output is filtered and amplified to insure sufficient level
to drive the mixer and provide isolation between the mixer and the synthesizer.
The down-converted output of the mixer passe s through a Low Pass Filter to reduce the
level of the LO and harmonic signals. The signal is input to the amplifier via a RF switch.
The amplifier provides approximately 25 dB of gain. Part of the signal is tapped off to the
leveling detector with the detected signal fed back to the AM modulator to level the output
of the amplifier to approxi10 dBm. The detected signal is input to the analog to
digital converter (A/D) for BIT testing and to monitor the AM modulation.
The amplified signal is input to an RF switch, where the signal is used as the source for the
SWR bridge or sent to the attenuators to set the output signal power. The SWR Bridge
receives an unmodulated CW signal from the RF converter. Using a 50
Ω
cable, the UUT is
connected to the SWR Connector and the reflected power is detected thorough the log amp.
It is necessary to calibrate the zero return loss by connecting a short and an open at the
end of the cable connected to the UUT. From these measurement the SWR of the UUT can
be calculated by the software.
Summary of Contents for IFR 4000
Page 1: ...NAV COMM Test Set Maintenance Manual 1002 5600 4P0 IFR 4000...
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