-27-
RF_O
RF_M
RFTC
LD
PD
PD1, PD2
FEBIAS
F, E
EI
VEE
TEO
LPFI
TEI
ATSC
TZC
TDFCT
VC
FZC
Pin No.
Pin Name
I/O
Description
33
34
35
36
37
38, 39
40
41, 42
43
44
45
46
47
48
49
50
51
52
O
I
I
O
I
I
I/O
I
—
—
O
I
I
I
I
I
O
I
Output terminal of RF summing amplifier. Checkpoint of Eye pattern.
Anti-reverse input terminal for RF summing amplifier.
The gain of RF amplifier is decided by the connection resistance between RF_M and RFO
terminals.
This is a pin where the selection time constant is externally connected to control the RF level.
APC amplifier output terminal.
APC amplifier input terminal.
RFI-V amplifier inverted input pin.
These pins are connected to the A+C and B+C pins of the optical pickup, receiving by currents
input.
Bias adjustment pin of the focus error amplifier. (Not connected)
F and EIV amplifier inverted input pins.
These pins are connected to the F and E of the optical pickup, receiving by current input.
Gain adjustment pin of the I-V amplifier E. (When not in use of BAL automatic adjustment)
GND connection pin.
Output terminal for tacking-error amplifier. Output E-F signal.
BAL adjustment comparator input pin. (Input through LPF from TEO)
Input terminal for tracking error.
Window-comparator input terminal for detecting ATSC.
Input terminal for tracking-zero cross comparator.
Capacitor connection pin for the time constant used when there is defect.
Output terminal for DC voltage reduced to half of VCC+VEE.
Input terminal for focus-zero cross comparator.
IC DESCRIPTION-2/7 (CXA1992AR)-2/2
Summary of Contents for LCX-K277
Page 2: ... 2 SPECIFICATIONS Design and specifications are subject to change without notice ...
Page 11: ... 11 SCHEMATIC DIAGRAM 2 5 MAIN2 2 TUNER C700 0 1 12V ...
Page 16: ... 16 SCHEMATIC DIAGRAM 4 5 VCD1 2 PIN3 R140 5 6k C320 0 1 FZ ...
Page 17: ... 17 SCHEMATIC DIAGRAM 5 5 VCD2 2 J501 ...
Page 20: ... 20 VOLTAGE CHART 1 1 ...
Page 44: ... 44 CD MECHANISM EXPLODED VIEW 1 1 DTA11T3C A M2 PIN 3 SW1 MOTOR C B 4 3 2 1 ...