-28-
FOK
FSW
MON
MDP
MDS
LOCK
NC
VCOO
VCOI
TEST
PDO
VSS
PWMI
V16M
VCTL
VPCO
VCKI
FILO
FILI
PCO
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
NC
PSSL
WDCK
LRCK
VDD
DATA
BCK
DATA64
BCK64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Pin No.
Pin Name
I/O
Description
I
O
O
O
O
O
—
O
I
I
O
—
I
O
I
O
I
O
I
O
—
I
—
I
I
I
O
I
—
I
O
O
—
O
O
O
O
Focus OK input. Used for SENS output and the servo auto sequencer.
Spindle motor output filter switching output. (Not connected)
Spindle motor on/off control output. (Not connected)
Spindle motor servo control. (Pin 5 is not connected)
High, when sampled value of GFS at 460Hz is high.
Low, when sampled value of GFS at 460Hz is low by 8 times successively.
Not used.
Analog EFM PLL oscillation circuit output. (Not connected)
Analog EFM PLL oscillation circuit input. fLOCK=8.6436MHz. (Connected to GND)
TEST pin. (Connected to GND)
Analog EFM PLL charge pump output.
GND.
Spindle motor external control input.
VCO2 oscillation output for the wide-band EFM PLL.
VCO2 control voltage input for the wide-band EFM PLL.
Wide-band EFM PLL charge pump output.
VCO2 oscillation input for the wide-band EFM PLL.
Multiplier PLL (slave=digital PLL) filter output.
Multiplier PLL filter input.
Multiplier PLL charge pump output.
Analog GND.
Multiplier VCO1 control voltage input.
Analog power supply. (5V)
EFM signal input.
Constant current input of the asymmetry circuit.
Asymmetry comparator voltage input.
EFM full-swing output.
Low: asymmetry circuit off; high: asymmetry circuit on.
Not connected.
Audio data output mode switching input. Low: serial output; high: parallel output. (Connected to
GND)
D/A interface for 48-bit slot. Word clock f=2Fs. (Not connected)
D/A interface for 48-bit slot. LR clock f=Fs.
Power supply. (5V)
DA16 (MSB) output when PSSL=1.
48-bit slot serial data (two’s complement, MSB first) when PSSL=0.
DA15 output when PSSL=1. 48-bit slot bit clock when PSSL=0.
DA14 output when PSSL=1.
64-bit slot serial data (two’s complement, LSB first) when PSSL=0. (Not connected)
DA13 output when PSSL=1. 64-bit slot bit clock when PSSL=0. (Not connected)
IC DESCRIPTION-3/7 (CXD2540Q)-1/3
Summary of Contents for LCX-K277
Page 2: ... 2 SPECIFICATIONS Design and specifications are subject to change without notice ...
Page 11: ... 11 SCHEMATIC DIAGRAM 2 5 MAIN2 2 TUNER C700 0 1 12V ...
Page 16: ... 16 SCHEMATIC DIAGRAM 4 5 VCD1 2 PIN3 R140 5 6k C320 0 1 FZ ...
Page 17: ... 17 SCHEMATIC DIAGRAM 5 5 VCD2 2 J501 ...
Page 20: ... 20 VOLTAGE CHART 1 1 ...
Page 44: ... 44 CD MECHANISM EXPLODED VIEW 1 1 DTA11T3C A M2 PIN 3 SW1 MOTOR C B 4 3 2 1 ...
