-38-
MUTE
DEEM
CKO
DVSS
BCKI
DI
DVDD
LRCI
TSTN
TO1
AVDDL
LO
AVSS
RO
AVDDR
MUTEO
XVDD
XTI
XTO
XVSS
DS
RSTN
MODE
ATCK
Pin No.
Pin Name
I/O
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
I
I
O
—
I
I
—
I
I
O
—
O
—
O
—
O
—
I
O
—
I
I
I
I
MODE = H: Soft mute ON/OFF terminal. (Mute at H)
MODE = L: Attenuator level DOWN/UP terminal. (DOWN at H)
De-emphasis ON/OFF terminal. (De-emphasis ON at H)
Oscillator clock output. (16.9344 MHz)
Digital VSS terminal.
Bit clock input terminal.
Serial data input terminal.
Digital VDD terminal.
Sample rate clock (fs) input terminal. (H = L ch/L = R ch)
Test input. (“H” or open during normal operation) (Not connected)
Test output 1. (Normally low level output) (Not connected)
Analog VDD terminal. (For L ch)
Left channel analog output terminal.
Analog VSS terminal.
Right channel analog output terminal.
Analog VDD terminal. (For R ch)
Infinity zero detection output.
X’tal system VDD terminal.
X’tal oscillator terminal. (Or external clock input terminal of 16.9344 MHz)
X’tal oscillator terminal.
X’tal system VSS terminal.
Double-speed/normal playback selection. (Double-speed at H)
Reset terminal. (Reset at L)
Soft mute/Attenuator mode selection. (Soft mute at H) (Not connected)
Attenuator level setup clock (Ignored when MODE = H) (Not connected)
IC DESCRIPTION-7/7 (SM5878AM)-1/1
Summary of Contents for LCX-K277
Page 2: ... 2 SPECIFICATIONS Design and specifications are subject to change without notice ...
Page 11: ... 11 SCHEMATIC DIAGRAM 2 5 MAIN2 2 TUNER C700 0 1 12V ...
Page 16: ... 16 SCHEMATIC DIAGRAM 4 5 VCD1 2 PIN3 R140 5 6k C320 0 1 FZ ...
Page 17: ... 17 SCHEMATIC DIAGRAM 5 5 VCD2 2 J501 ...
Page 20: ... 20 VOLTAGE CHART 1 1 ...
Page 44: ... 44 CD MECHANISM EXPLODED VIEW 1 1 DTA11T3C A M2 PIN 3 SW1 MOTOR C B 4 3 2 1 ...
