Pin Descriptions
Pinout Information
2.3
Pin Descriptions
Table 2-1
provides detailed Video Port pin descriptions.
Table 2-1 Video Port Pin Descriptions
Name
Pin(s)
Type
Function
VCLK
71
ID 5
VPort Pixel Clock. The VCLK pin is used for video port image capture.
The polarity can be selected by the VCLKPOL bit.
VVS
74
ID 5
VPort Vertical Sync. Indicates start of next field or frame of input data. This
signal is internally polarity corrected so VVS can be either active-high or
active-low. The current status of the VVS signal is given by VPOL and
VSOK status bits when the video port is selected by the PORTSEL bit.
VVS is not used when a composite digital sync source is used (COMPEN).
VVS is required in ITUR656 input mode.
VHS
75
ID 5
VPort Horizontal Sync. Indicates start of next line of data input. This signal
is internally polarity corrected and monitored for composite sync content.
The current status of the GHS signal is given by the HPOL, HSOK &
COMP status bits when the video port is selected by the PORTSEL bit.
VHS can supply horizontal sync information or digital composite sync
information depending on the COMPEN bit. VHS is required in ITUR656
input mode.
VPEN
70
ID 5
VPort Pixel Enable. Used when external flow control capture mode is
enabled by the EXTFCE bit. When VPEN is active, the input data is valid.
The polarity can be selected by the PENPOL bit. Use of this pin allows
non-contiguous input data.
VFIELD
69
ID 5
VGPort Field Input. Video or Graphics port odd/even field indicator
specifies whether odd or even field of interlaced input is being
captured.This pin is enabled by the FLDSEL bit and the polarity can be
specified by the FLDINV bit. Field information can also be derived from
VVS and VHS, so VFIELD is not required in some applications.
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