Akai LT-32Q5LFH, Service Manual

Page 1: ...Model LT 32Q5LFH SERVICE MANUAL 32 WIDE TFT LCD TV ...

Page 2: ...ations 5 Location of control 9 Trouble Shooting 12 Deassembly procedure 14 Exploded Drawing 19 Wire dressing 21 Adjustment instruction with Default Factory Data 22 Inspection instruction 23 PCB Layout 26 Schematic Diagram 31 Replacement part list 32 Block Diagram 38 Circuit descriptions 39 ...

Page 3: ...d metallic part Any voltage measured must not exceed 0 75 volt RMS which is corresponds to 0 5mA In case any measurement is out of the limits specified there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer Leakage Current Hot Check circuit Important Safety Notice Many electrical and mechanical parts in this chassis have special safety r...

Page 4: ...upply heatsink in this receiver Electrostatically Sensitive ES Devices Some semiconductor solid state devices can be damaged easily by static electricity Such components commonly are called Electrostatically Sensitive ES Device Examples Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board ...

Page 5: ...rs 18AWG for AC 220 240V area 3 Tuning system FVS 100 Program 4 Sound output 10W 10Wrms Stereo Max 5 Antenna input impedance VHF UHF at 75ohm 6 OSD Type On Screen Display Windows type Center 7 External in output HDMI INPUT PC ANALOG INPUT PC AUDIO INPUT HEADPHONE OUTPUT SVC port S VIDEO AUDIO INPUT S VIDEO INPUT COMPONEN INPUT COAXIAL OUT SCART 1 FULL SCART 2 HALF TUNER 8 Function CATV Hyper band ...

Page 6: ... ل 8 SECAM D ل 9 SECAM K ل 10 SECAM K1 ل 11 SECAM I 6 0 ل 12 NTSC 3 58 4 5 Ή 13 NTSC 3 58 5 5 Ή 14 NTSC 3 58 6 0 Ή 15 NTSC 3 58 6 5 Ή 16 NTSC 3 58 4 5 5 0 Ή 17 NTSC 4 43 5 5 Ή 18 NTSC 4 43 6 0 Ή 19 NTSC 4 43 6 5 Ή 20 PAL 5 5 60Hz ل 21 PAL 6 0 60Hz ل 22 PAL 6 5 60Hz ل 23 SECAM 5 5 60Hz ل 24 SECAM 6 0 60Hz ل 25 SECAM 6 5 60Hz ل 26 SECAM L L ل TOTAL SYSTEM 18 ...

Page 7: ...mal there is nothing wrong with the set If possible use the XGA 1024 x 768 60HZ video mode ྀ to obtain the best image quality for your LCD monitor If used under the other resolutions some scaled or processed pictures may appear on the screen Some dot defects may appear on the screen like Red Green or Blue spot However this ཱྀ will have no impact or effect on the monitor performance G SPECIFICATIONS...

Page 8: ...Patterned Vertical Align mode Wide verwing anale ധ170 High speed response WXGA 1366 X 768 pixels resolution 16 9 Low Power consumption Dyrect Type 16 CCFL Cold Cathode Fluorescent Lamp DE only mode LVDS Low Voltage Differential Signal interface 1pixel clock Applications Home alone Multimedia TFT LCD TV Display terminals for AV applications products High Definition TV HD TV Feature Size 32 0 inches...

Page 9: ...IDEO RADIO Only when the set is Radio On COMPONENT PC ANALOG HDMI mode Clears the menu from the screen 5 MENU Displays a main menu 6 LIST Displays the programme list menu 7 I II Selects the language during dual language broadcast Selects the sound output 8 SLEEP Sets the sleep timer 9 PÏP Returns to the previously viewed programme 10 PRx PRy Programme Up Down Selects next programme or a menu item ...

Page 10: ...XT buttons These buttons are used for Teletext For further details see the Teletext section 18 INPUT Selects the AV source of sub picture in PIP mode 19 PIP Displays a PIP Picture In Picture screen 20 POSITION Selects a position of PIP screen 21 SWAP Switches a main picture to sub picture in PIP mode 22 MODE Selects a PIP screen mode 16 1 9 1 and 3 1 mode 23 PIP PRx PIP PRy Selects a programme whe...

Page 11: ...Down Selects a programme or a menu item 4 Ï VOLq Volume Up Down Adjusts the volume Adjusts menu settings 5 TV AV Selects TV SCART1 SCART2 S VIDEO RADIO Only when the set is Radio On COMPONENT PC ANALOG HDMI mode Clears the menu from the screen 6 Power Indicator Illuminates in red when the TV is in standby mode Illuminates in green when the TV is switched on 7 Remote control sensor Accepts the IR s...

Page 12: ... U Op G SG G G UPG G j G G x_W GOZPG G aGY fG G uG j G G wZWZGOY Y PGaG f j G G x_W GOZPG G aGY fG x_W OXP a W f u y G ztwzG G y G x_WWG G y G x_W G j G pj_W GOZPG G G aG fG pj_W O P a W f y G pj_W G G G u u u j G pj_YXGOZPG G G aG fG pj_YX O P a W f y G pj_YXG u y G pj_W G G u Gy G ...

Page 13: ...jPG G cGX fG y G k WXG u pjXWXG G OXYZVXY GsVyPG xXW VXW GOlPG z G GfG u y GpjXWXG u G pjYWYGOXWPG G dGW fG y G pjYWYG u u GslkG slkG G y GaGWGfG pj_W GO PGcTeG G nukG G y G pj_W GVGk_ WG G j G G h GzjsVzkhG sGs GfG pjWXGO PG z G j G Gs PG sGs GfG G y G G u Tv G pjUG u y GpjWXG uG G u Gz GMG G w GvrG G G G G u Gv G ...

Page 14: ...SERVICE MANUAL DEASSEMBLY PROCEDURE 1 Disassembly procedure 1 Back cover Remove 4 screwsG G G G Remove 8 crewsG G G G Removal of Backcover ...

Page 15: ...SERVICE MANUAL DEASSEMBLY PROCEDURE 2 Metal plate Rear chassis Remove 5 screwsG G G G Removal of rear metal chassis G G G G Remove 5 screwsG G G G Slide away the metal plateG G G G ...

Page 16: ...SERVICE MANUAL DEASSEMBLY PROCEDURE 3 Metal plate Rear chassis Remove 6 connectorsG G G G Remove 11 screwsG G G G ...

Page 17: ...SERVICE MANUAL DEASSEMBLY PROCEDURE 4 LCD Panel chassis ٻ Remove 28 screws then take LCD BRKT Removal of LCD Module take LCD BRKT Removal of LCD Module ...

Page 18: ...SERVICE MANUAL DEASSEMBLY PROCEDURE 5 LCD Module Remove 8 screws then take LCD BRKT Front mask remains after removing LCD Module G ...

Page 19: ...AR PLATE PVC BLACK 1 14 401 004L COVER BACK ABS DARK GRAY 1 15 402 007F STAND BOTTOM ABS DARK GRAY 1 16 402 007H BRACKET STAND EGI 2 17 402 007G BRACKET BOTTOM EGI 1 18 496 001M RUBBER FOOT RUBBER BLACK 4 19 410 001Q BTB 4 12 SZN 34 20 410 001L TTB 3 10 SZN 4 21 410 008C FHTTB 4 8 SZN 4 22 410 008D BTB 4 25 SZN 4 23 410 001R PB 4 8 SZN 10 24 410 001N FTB 3 6 SZN 19 25 410 008E FHM 4 8 SZN 6 26 496...

Page 20: ...SERVICE MANUAL WIRE DRESSING 1 Wire Dressing Note Using acetate Using Copper Conducted tape Using Ferrite Cpre Using Copper Tape Using Ferrite Cpre ...

Page 21: ...es to find SVC Data 3 Input the corresponding SVC data referring to Table below with the VOL ඔඖ key 4 Press TV AV button to exit SVC mode 1 1 Factory outgoing setting Initialize with default data into the SVC mode ΒΚΟ ΞΖΟΦ ʹΙΒΟΘΖ ΧΒΝΦΖ ΦΓ ΞΖΟΦ ʹΙΒΟΘΖ ΧΒΝΦΖ ΠΕΖΝ ͽ ͽΒΟΘΦΒΘΖ ΡΥΚΠΟ ͶΆ ͶͲ ΈΙΚΥΖ ͳΒΝΒΟΔΖ ΈΙΚΥΖ ͳΒΝΒΟΔΖ ΦΓ ΞΖΟΦ ΖΥΥΚΟΘΤ Ͳͽͽ ΥΒΣΥ ʹ ΊΖΤ ΡΥΚΠΟ ΡΥΚΠΟ ΦΓ ΞΖΟΦ ΪΤΥΖΞ ͳ ͺ ͼ ͽ ʹΙΚΟΒ ͲΦΤΥΣΒΝΚΒ ͿΠ Ͳ ͳ...

Page 22: ...WZTXWrG YUGtvklsGaGsG UGwjGw Gn G G G G G G XWY G G _SG Wo G G G G Ow Gn GaGtzwnTZ YWPG UGz GaGh G UGz GaGh Gz Gj G UGwjG Gi Gz 譄G _UG Gi Gz G G ZUGs Gv G G aG G lz G l G lhG XWUGl GaG G tzwnT Y mzG G G tvklG G G G G aGXWY Q _G UGw Gn GaGtzwnTZ YWG G G G wh luG G aGw Gu UGaGZZG G G G tvklG G G aGXWY Q _OXZPG ...

Page 23: ... G G G G G G G G G G G G G XG wvpu G G zl Viv Gmyvu G zl Viv Gmyvu G INSPECTION INSTRUCTION 2 Packing condition iv Gmyvu zl Gmyvu c YeGzl G G Giv G c GXeGwhjrpunG G Giv whjrpunGiv vtG iv Gmyvu G zl Gmyvu G zl GihjrG G hjjlzzvy Giv G c ZeGh Gi G G whjrpunG vwG G sG G G G G G G G G G G G zl Gmyvu c eG vwGwhjrpunG G Giv zl Gmyvu Q G ...

Page 24: ...ccessories are provided with Product 2 Remote controller 4 Instruction manual 5 VGA cable 6 PC Audio IN cable 3 Batteries type AAA 1 AC Cord Model LT 32Q5LFH Owner s Manual 32 WIDE TFT LCD TV SERVICE MANUAL INSPECTION INSTRUCTION ...

Page 25: ...ET LT32Q5LFH 1 1 SET Packing Exploded Drawg MA05 042 DRAWING NO TITLE NO PARTNO DESCRIPTION MATERKAL COLOR Q TY 1 LCD COLOR TV 1 2 321 006A BAG PACKING PE WHITE 1 3 310 026G PACKING ASS Y EPS WHITE 1 4 300 021F BOX CARTON PAPER 1 5 ACCESSORY ASS Y 1 6 499 002A TAPE OPP 70mm 4000mm 5 3 6 ...

Page 26: ...E MANUAL PCB LAYOUT 1 CONTROL PCB 2 Tuner PCB r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r ...

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Page 32: ...vytSGzoplsk X 490 021E MK 15 5 55 FORM SHIELD 1 490 021F MK 10 2 10 FORM SHIELD 1 490 021G MK 15 18 97 FORM SHIELD 1 491 001A W40mm L20mm COPPER TAPE CONDUCTIVE 1 YTWWXh jspwSG jh XZY TW ZW mlyyp lGjvyl Y 492 001B CLIP ZCHT1730 0730 FERRITE CORE 2 YTWWXk jspwSG jh YWZ TW ZW mlyyp lGjvyl X TWWYh a W hwlSGvww WWW 499 004A W 20mm L 30m TAPE ACETATE 210 500 083P 32H S5 6EA SCHNEIDER OWNERS MANUAL 1 50...

Page 33: ...2627 SPK 3P 600MM LEAD ASSY 1 CON05P200ABH 301 LED 5P 200MM H H LEAD ASSY 1 CON07P200AD3 VCTI 232627 7P 10P LEAD ASSY 1000CTRL 1 CON12P200ACL 32 W2 IVT 12P 300MM LEAD ASSY 1 CON12P250ACX 32 SMPS 12P 850MM LEAD ASSY 1 CON30P125ACF 32 SS CORE GND 150MM LEAD ASSY VCTi 32 1 PANLTA320W02 32 SS LTA320W2 L03 PANEL LCD COLOR 1 REPLACEMENT PART LIST 2 Parts List Assemble Process ...

Page 34: ...ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ΥΪ ΥΪ ΥΪ ΥΪ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹͶ ͷ ͳ Άͷ 470U ʹ ʹ ʹ ʹ ʹ ͺʹͼͶ Ͳ ͺʹ ͼͺͲ KIA7808AP ͺʹ ͺʹͶͿ ͷ ͷͽͲ ͶͶ ͺ EON EN29F040A 70PIP ͺʹ 0JAHDD15S0SD HDD 15S VERTICAL D SUB 15P ͻ ͻͲ Ͷ ͳ ʹͲ Έ 櫺 AUDIO LR ͻ ͻͲ ͻͲʹͼ ͺ HDMI 51V019S33WNA ͻ 0JASWDJ050SD DJ05 04P Q VERTICAL S VIDEO ͻ Ή ͼͺ 14 318M Ή Ή ͼͺ 18 432M Ή Ή ͼͺ ʹΣΪΤΥΒΝ 20 25M Ή ͺʹͺ Ͳ Ͳ Ͳ Ͳ AC150...

Page 35: ... Άͷ 0 01 ʹ ʹ ʹ ʹ ʹ ʹΒΡΒΔΚΥΠΣ ΔΙΚΡ Άͷ 0 1U ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ Ά 0 1u ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ ʹ Ͷͼ Ά 1UF ʹ ʹ ʹ ͼ ͷ 1500p ʹ ʹ ʹ ʹ ʹ ͻ ʹΒΡΒΔΚΥΠΣ ʹΙΚΡ ͷ 22P ʹ ʹ ʹ ͻ ʹͲ Ͳʹͺ ʹ ͺ 220p ʹ ʹ ͼ ʹΒΡΒΔΚΥΠΣ ΔΙΚΡ ͷ 2200p ʹ ʹ ʹ ʹΒΡΒΔΚΥΠ...

Page 36: ...ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 10K ͻ ͼ ͻ 12K ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 100K ͻ ͻ 1M ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 1 2K ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ΠΙΞ 150 ͻ ͼ ͻ 15K ͻ ͻ 180 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ΠΙΞ 22 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 22K ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 2 7K ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 27K ͻ ͻ 33 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 3 3K Ί ͷͻ ͻ 10 Ͳ Ͳ Ί ͷͻ Ͷ ͺ Ͳ ͲΊ ʹ ͺ 33 OHM 3216 Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ Ͳ ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 3 9K ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 39K ͻ ͻ 3 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ΠΙΞ 47 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ΠΙΞ ...

Page 37: ...ΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ͼͶ ͼ ʹ C3875 ͻ ΖΤΚΤΥΠΣ ΔΙΚΡ ͼ 4 7K GRLT51AS001G HD READY 32 PANEL S I 5V ͽͶ Ͷͽ ͽͶ Ͷͽ ͽͶ Ͷͽ ͽͶ Ͷͽ Ϳ Ϳ Ϳ Ϳ ΖΤΔΣΚΡΥΚΠΟ ΖΤΔΣΚΡΥΚΠΟ ΖΤΔΣΚΡΥΚΠΟ ΖΤΔΣΚΡΥΚΠΟ Device N ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ͷΦΟΔΥΚΠΟ Ϳ ΥΪ ΥΪ ΥΪ ΥΪ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ ʹΚΣΔΦΚΥ ͿΠ Ͷͻ ͻ 0 2012 ͽ Ͳ Ͳ ͽ Ͳ Ͳ ͽ Ͳ Ͳ ͽ Ͳ Ͳ ͶͲ ͺͿͼ ͺ ͶͲ ͺͿͼ ͺ ͶͲ ͺͿͼ ͺ ͶͲ ͺͿͼ ͺ ͽͶ Ͷͽ ͽͶ Ͷͽ ͽͶ Ͷͽ ͽͶ Ͷͽ Ϳ Ϳ ...

Page 38: ...l PG u zjVt s pG oktpTyniG wjTyni yniSmiG h TpuVv G h TpuVv j pm o k t p w j T y n i y n i S m i G h T p u V v G w w O k T P h T p u V v w w y O k k P j p m j p G y n i S o z S z sjkGwhuls whulsGkyp lG s kzG G G G G wv lyG G Opu ly lyPG w G ppjG w G ppjG w G ppjG w G Op Vz V hkjV j pPG kjTpu htw sVy w oVwGhtw sVy kjTpuG kjTpuG Y G Y VZYG zv ukG w zjYGsVyG wjGsVyG k G s V y p Y j z w w Ok kPG w w O...

Page 39: ...ntended to be a finished product Basically a display device mounted inside an enclosure which will provide the safety Requirements With the exception of LCD Panel the display device shall be composed entirely of solid state components These components shall have a history of reliable service in identity applications and shall be applied in the circuits 1 SCALER SECTION 2 VCT 49xxi SECTION 3 Video ...

Page 40: ...1 0 compliant receiver High bandwidth Digital Content Protection HDCP 1 1 compliant receiver High Definition Multimedia Interface HDMI 1 0 compliant receiver with I2S and S PDIF digital audio outputs Long cable tolerant robust receiving Video Input Port Two 4 2 2 ITU656 8 bit digital video input ports One 4 2 2 ITU601 16 bit digital video input port Supports 16 bit YUV 4 2 2 interlaced progressive...

Page 41: ...y scaling engines an on screen display controller and a built in output clock generator By use of external frame buffer PIP POP is provided for multimedia applications It supports de interlaced full screen video video on graphic overlay split screen frame rate conversion and aspect ratio conversion for various video sources To further reduce system costs the MST5151A also integrates intelligent po...

Page 42: ... LVA0P LVA1M LVA1P LVA2M LVA2P LVACKM LVACKP GND VDDP LVA3M LVA3P GND BYPASS GND DVI_R DVI_R GND GND DVI_G DVI_G AVDD_DVI DVI_B DVI_CK AVDD_DVI AVDD_PLL DDCD_DA GND HSYNC1 BIN1P BIN1M DVI_B GND DVI_CK REXT GND DDCD_CK AVDD_ADC VYSNC1 SOGIN1 GIN1P GIN1M RIN1P RIN1M BIN0M BIN0P GIN0M GIN0P SOGIN0 RIN0M RIN0P AVDD_ADC GND HSYNC0 VSYNC0 RMID REFP REFM VI_DATA 8 VI_DATA 9 VI_DATA 10 VI_DATA 11 VI_DATA ...

Page 43: ...r Input w 5V tolerant Analog VSYNC Input from Channel 0 37 BIN0M Analog Input Reference Ground for Analog Blue Input from Channel 0 27 BIN0P Analog Input Analog Blue Input from Channel 0 28 GIN0M Analog Input Reference Ground for Analog Green Input from Channel 0 29 GIN0P Analog Input Analog Green Input from Channel 0 30 SOGIN0 Analog Input Sync On Green Input from Channel 0 31 RIN0M Analog Input ...

Page 44: ... DVI Input Clock 9 Video Interface Pin Name Pin Type Function Pin VI_CK Input w 5V tolerant Digital Video Input Clock 66 VI_DATA 15 0 Input w 5V tolerant Digital Video Input Data 15 0 48 41 61 54 Digital Audio Interface Pin Name Pin Type Function Pin AUMCK Output Audio Master Clock Output 188 AUSD Output Audio Serial Data Output 4mA driving strength 189 AUSCK Output Audio Serial Clock Output 4mA d...

Page 45: ...al Data Output 186 LVB1M Output B Link Negative LVDS Differential Data Output 181 LVB1P Output B Link Positive LVDS Differential Data Output 180 LVB2M Output B Link Negative LVDS Differential Data Output 179 LVB2P Output B Link Positive LVDS Differential Data Output 178 LVB3M Output B Link Negative LVDS Differential Data Output 175 LVB3P Output B Link Positive LVDS Differential Data Output 174 LVB...

Page 46: ...s 130 127 124 117 MDATA 31 0 I O Memory Data 82 85 88 99 135 138 141 152 Misc Interface Pin Name Pin Type Function Pin XIN Crystal Oscillator Input Crystal Oscillator Input 203 XOUT Crystal Oscillator Output Crystal Oscillator Output 202 DDCD_DA I O w 5V tolerant HDCP Serial Bus Data DDC data of DVI port 4mA driving strength 14 DDCD_CK Input w 5V Tolerant HDCP Serial Bus Clock DDC Clock of DVI Por...

Page 47: ...AM Interface Power 86 102 113 125 139 154 VDDP 3 3V Power Digital Output Power 66 162 182 VDDC 1 8V Power Digital Core Power 63 79 131 156 173 185 195 GND Ground Ground 1 7 13 16 35 50 64 65 80 87 103 108 114 126 132 140 155 157 159 163 172 183 184 194 205 206 CIRCUIT DESCRIPTIONS ...

Page 48: ...31 0 142 D 31 20 1 228 D1 28 00 1 102 D2 25 50 1 004 E 31 20 1 228 E1 28 00 1 102 E2 25 50 1 004 R1 0 13 0 005 R2 0 13 0 30 0 005 0 012 Millimeter Inch Symbol Min Nom Max Min Nom Max θ 0 7 0 7 θ1 0 0 θ2 8 Ref 8 Ref b 0 17 0 20 0 27 0 007 0 008 0 011 c 0 11 0 15 0 23 0 004 0 006 0 009 e 0 50 BSC 0 020 BSC L 0 73 0 88 1 03 0 029 0 035 0 041 L1 1 60 Ref 0 063 Ref S 0 20 0 008 E2 D2 CIRCUIT DESCRIPTIO...

Page 49: ...ruction set compatible CPU Up to 256 kB on chip program ROM WST PDC VPS and WSS acquisition Closed Caption and V chip acquisition Up to 10 pages on chip teletext memory Multi standard QSS IF processing with single SAW FM Radio and RDS with standard TV tuner TV sound demodulation all A2 standards all NICAM standards BTSC SAP with MNR DBX optional EIA J Baseband sound processing for loudspeaker chan...

Page 50: ...t Test Logic I2C Master Slave 24kB Char ROM TEST RESETQ XTAL2 I2C Pxy CVBS in IFIN IFIN TAGC SIF YCrCb in CVBS out RGB in AOUT SPEAKER RGB out SVM RGB in SENSE RSW VERT EW HOUT PROT HFLB Panorama Scaler Display Deflection Processor Timer CRT PWM ADC UART Watchdog RTC I O Ports Memory Interface ADB DB PSENQ PSWEQ WRQ RDQ CPU 8051 AIN Video Frontend Color Decoder Component Interface Comb Filter CIRC...

Page 51: ...ND Sense ADC Input 10 137 GNDM IN GND Reference Ground for Sense ADC 11 138 FBIN IN GND Fast Blank Input Back end 12 139 RIN IN GND Analog Red Input Back end 13 140 GIN IN GND Analog Green Input Back end 14 141 BIN IN GND Analog Blue Input Back end 15 142 SVMOUT OUT VSUP5 0BE Scan Velocity Modulation Output 16 143 ROUT OUT VSUP5 0BE Analog Red Output 17 144 GOUT OUT VSUP5 0BE Analog Green Output 1...

Page 52: ...49 P11 IN OUT LV Port 1 Bit 1 Input Output 42 50 P10 IN OUT LV Port 1 Bit 0 Input Output 43 53 VSUP3 3FE SUPPLY OBL Supply Voltage Analog Video Front end 3 3 V 44 54 GND SUPPLY OBL Ground Platform 45 55 GND SUPPLY OBL Ground Platform 46 56 VSUP1 8FE SUPPLY OBL Supply Voltage Analog Video Front end 1 8 V 47 57 VOUT3 OUT LV Analog Video 3 Output 48 58 VOUT2 OUT LV Analog Video 2 Output 49 59 VOUT1 O...

Page 53: ... VREFIF Differential IF Input 74 111 VREFIF OBL Reference Voltage IF ADC 75 112 TAGC OUT LV Tuner AGC Output 76 113 AIN1R SIF IN OUT GND Analog Audio 1 Input Right Analog 2nd Sound IF Output 77 114 AIN1L IN GND Analog Audio 1 Input Left 78 115 AIN2R IN GND Analog Audio 2 Input Right 79 116 AIN2L IN GND Analog Audio 2 Input Left 117 AIN3R IN GND Analog Audio 3 Input Right 118 AIN3L IN GND Analog Au...

Page 54: ...IN OUT LV Port 3 Bit 2 Input Output Digital 656 Bus 2 Input Output 79 P31 656IO1 IN OUT LV Port 3 Bit 1 Input Output Digital 656 Bus 1 Input Output 80 P30 656IO0 IN OUT LV Port 3 Bit 0 Input Output Digital 656 Bus 0 Input Output 81 P26 656VIO IN OUT LV Port 2 Bit 6 Input Output Digital 656 Vsync Input Output 82 P25 656HIO IN OUT LV Port 2 Bit 5 Input Output Digital 656 Hsync Input Output 83 P24 65...

Page 55: ...a Bus 3 Input Output 92 DB4 IN OUT LV Data Bus 4 Input Output 93 DB5 IN OUT LV Data Bus 5 Input Output 94 DB6 IN OUT LV Data Bus 6 Input Output 95 DB7 IN OUT LV Data Bus 7 Input Output 32 RDQ OUT LV Data Read Enable Output 33 WRQ OUT LV Data Write Enable Output 34 OCF OUT LV Opcode Fetch Output 35 ALE OUT LV Address Latch Enable Output 36 RSTQ OUT LV Internal CPU Reset Output 97 PSENQ OUT LV Progr...

Page 56: ...ible to these pins It is recommended to use more than one capacitor By choosing different values the frequency range of active decoupling can be extended IF Pins VREFIF Reference Voltage for Analog IF Fig 4 9 This pin must be connected to GNDIF via a circuitry according to the application circuit Low inductance caps are necessary IFIN IFIN Balanced IF Input Fig 4 6 These pins must be connected to ...

Page 57: ... µF in parallel to 100 nF low inductance is required XREF DAC Current Reference Fig 4 20 External reference resistor for DAC output currents typical 10 kΩ to adjust the output current of the D A converters see recommended operating conditions This resistor has to be connected to ground as closely as possible to the pin CRT Pins VPROT Vertical Protection Input Fig 4 22 The vertical protection circu...

Page 58: ... for the control ler ADC P24 P26 P30 P37 I O Port Fig 4 34 These pins provide CPU controlled I O ports ADB0 ADB19 Address Bus Output Fig 4 35 These 20 lines provide the CPU address bus output to access external memory DB0 DB7 Data Bus Input Output Fig 4 36 These 8 lines provide the bidirectional CPU data bus to access external memory WRQ Data Write Enable Output Fig 4 35 This pin controls the dire...

Page 59: ...106 107 108 GIN RIN FBIN GNDM BIN SVMOUT RSW2 EW VERT VERT RSW1 SENSE VSUP5 0BE TEST GND GND VREFAU VSUP8 0AU SPEAKERR SPEAKERL AOUT1L AOUT1R AOUT2L AOUT2R AIN3R AIN3L AIN2L AIN2R AIN1L AIN1R SIF TAGC VREFIF IFIN IFIN ROUT GOUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 BOUT VRD XREF VSUP3 3BE GND GND VSUP3 3IO VSUP3 3DAC GNDDAC SAFETY HFLB H...

Page 60: ...ions F1 and F2 are intended to solve the remaining problems Table 1 1 History of field problems No Field Problem C7 D2 D4 D5 F1 F2 Comment FP01 Streaky Noise x x x x Problem solved in F1 FP02 Modulator Imbalance x x x x Problem solved in F1 FP03 FM Modulation x x x x Problem solved in F1 FP04 Color Clipping x x x x x Problem to be solved in F2 FP05 Closed Caption Performance x x x x Problem to be ...

Page 61: ...n D2 Problem solved in F1 workaround available 52 OSD Jitter x x Problem appeared in D2 Problem solved in D5 53 MSP Automatic Standard Detection for EIA J x x x Problem solved in D4 54 MSP Standard Toggle in HDEV Mode fails x x x Problem solved in D4 55 OSD Offset Compensation x x x x x Problem solved in F1 56 ESD Induced Reset Problem appeared in D2 Problem solved in F1 workaround available 57 Wh...

Page 62: ... 68 BSO x x x x x Problem solved in F1 69 H Out Jitter x x x Problem solved in F1 workaround available 70 SCE Luma Input x x x new feature in D2 Problem solved in F1 71 YUV ECO Mode x x x x x Problem solved in F1 72 Scaler Bondoption x x x x x Problem solved in F1 73 FM radio not working Problem appeared in F1 Problem to be solved in F2 workaround available 74 ITU656 Biterror x Problem appeared in...

Page 63: ...ing adaption doesn t work Thus the peaking signal is limited only hardware redesign D1 D1 40 Bandwidth of Antialias Filter The bandwidth adjustment of the antialias filter 1 6 is disturbed This causes wrong filter settings after reset and or after a modification of TRIM_FILTER1 6 hardware redesign D1 workaround 0xb0 0x2f 0x00 0x01 D1 41 SVM Overflow The SVM output signal is not lim ited correctly ...

Page 64: ...Automatic standard detection fails if EIA J is selected as preferred 4 5MHz sound carrier firmware redesign D4 workaround avoid Mod_4_5MHz 1 0 1 0 If Mod_ASS and Mod_Dis_Std_Chg 1 EIA J is detected anyhow D4 54 MSP Standard Toggle in HDEV Mode fails Toggling between Standard 3 and 8 while Mod_HDEV_A 1 leads to occasional sound impairments firmware redesign D4 workaround not available D4 No Problem...

Page 65: ...mode for vertical peaking in 4H combfilter allows switching between 2H and 1H peaking filter See new register VPM in section 2 1 2 F1 F20 Fastblank Output The fastblank signal of the TVT display generator is availbale as output signal for LCD Scaler applications It can be programmed to the pin PWMV P11 and P21 F1 No Problem Description Comment Ok FP06 VSP AGC performance Poor performance with some...

Page 66: ...Reset Range Function Advanced Settings MOD_ACCU_BS 9 0 h10 h100E 10 1 RW 0 512 511 Modulator imbalance value Write set manual imbalance value with MOD_IF 0 MOD_IR 0 for take over set MOD_UPDATE 1 Read compensated imbalance value MOD_UPDATE h10 h100E 0 W 0 0 1 Update modulator imbalance 1 write Modulator imbalance value into hardware MOD_TH 3 0 h10 h100F 11 8 W 5 0 15 Imbalance control threshold Se...

Page 67: ...e also section 2 1 1 4 WP5 2 1 1 3 Status of VCT 49xyI F1 and how to deal with currently used workarounds The following table gives recommendations how to deal with workarounds used at C7 Dx No Problem Countries Workaround for C7 Dx Side Effect Status in F1 Recommen dation for F1 FP1 Streaky Noise Korea T1 Coefficients for M N Speed up DRX video AGC write VAGC_KI 5 every 20ms write TAGC_KI 2 every...

Page 68: ... MOD_If 0 write MOD_ACCU_BS 0 consider also W2 none under inves tigation W2 MOD_ACCU_BS must be written several times until value is accepted Write MOD_ACCU_BS until readback value matches written value remember that MOD_UPDATE has to be 1 for writ ing MOD_ACCU_BS none firmware redesign W3 FM radio not working root cause fast carrier recovery is automatically ON in FM radio mode should be OFF Set ...

Page 69: ...11 70 MINVWIN hB5 15 RW VS_CD 0 0 1 Calculate MINV 0 every line 1 over 4 lines Note set to 0 for standard CVBS and 1 for component input THRELIM hB5 14 RW VS_CD 0 0 1 Limit Threshold to MINV 0 no limitation 1 limit CETHD 1 0 hB5 13 12 RW VS_CD 0 0 1 2 3 Coarse Error Threshold 00 255 01 192 10 160 11 128 THRELP 1 0 hB5 11 10 RW VS_CD 0 0 3 Lowpass Coeff for Threshold Value 00 very strong 01 strong ...

Page 70: ... 00 sync amplitude and peak white 01 sync amplitude only 10 sync amplitude peak white and peak dark 11 fixed to value AGCADJ1 I2C REV 4 0 hFC 4 0 R 1 2 3 4 5 6 VCTH Revision h01 VCTH 01 01 h02 VCTH 02 01 h03 VCTH 03 01 h04 VCTJ 01 01 h05 VCTJ 02 01 h06 VCTH 04 01 Table 2 7 Wrongly Documented VSP Registers Name Sub Dir Sync Reset Range Function ITU EN_656 1 0 h50 1 0 RW VS_ITU 0 0 1 2 3 Enable ITU6...

Page 71: ...ocessing must be equal to PPLOP ODC PPLOP 11 0 h17 11 0 RW upd_pplop 1296 0 4095 Pixel Per Line Output must be equal to PPLIP BLE MINRED h3E 13 RW VS_DP 0 0 1 Enable Entropy Adaption 0 entropy adaption off 1 entropy adaption on LUMAMIX LMIXMODE h47 14 RW VS_DP 1 0 1 Luminance Mixer Mode 0 static mixer 1 amplitude adaptive mixer LMIXCOF 5 0 h47 13 8 RW VS_DP 0 0 63 Luminance Mixer Coefficient stati...

Page 72: ...4 10 0 RW 1426 0 2047 HSync Period Maximum Table 2 13 Wrongly Documented TVT Registers Name Addr Dir Reset Range Function RTC RTCRW h8F 4 RW 0 0 1 RTC Read Write RTCSUB 3 0 h8F 3 0 RW 0 0 15 RTC Subaddress MEMORY INTSRC0 hE8 5 RW 0 0 1 Interrupt 0 Source 0 Int0 is source 1 CRT is source INTSRC1 hE8 4 RW 0 0 1 Interrupt 1 Source 0 Int1 is source 1 CRT is source PATCH hE8 3 RW 0 0 1 Patch Modul 0 en...