52
ATS9462 User Manual
Optional ECLK (External Clock) Input
Signal Level
LVTTL levels or 200 mV sine wave
Input impedance
50
Ω
Input Coupling
AC or DC
,
software selectable
Maximum frequency
Fast External Clock:
125 MHz with 50%
±
5% duty cycle
Slow External Clock:
10 MHz with minimum positive or
negative pulse width of 10 ns
10 MHz Clock Reference: 10.5 MHz
Minimum frequency
Fast External Clock:
1 MHz with 50%
±
5% duty cycle
Slow External Clock:
DC
10 MHz Clock Reference: 9.5 MHz
Decimation factor
Software selectable from 1 to 100,000
Fixed to 1 for Slow External Clock
Sampling Edge
Rising or Falling,
software selectable
Sample Rates Available With
10 MHz Clock Reference:
150 MS/s, 151 MS/s, 152 MS/s, 153 MS/s,
154 MS/s, 155 MS/s, 156 MS/s, 157 MS/s,
158 MS/s, 159 MS/s, 160 MS/s, 161 MS/s,
162 MS/s, 163 MS/s, 164 MS/s, 165 MS/s,
166 MS/s, 167 MS/s, 168 MS/s, 169 MS/s,
170 MS/s, 171 MS/s, 172 MS/s, 173 MS/s,
174 MS/s, 175 MS/s, 176 MS/s, 177 MS/s,
178 MS/s, 179 MS/s, 180 MS/s
Note that the accuracy and stability of these
sampling frequencies is dependent on the
accuracy and stability of the 10 MHz Clock
Referece input supplied by the user
Triggering System
Mode
Edge triggering with fixed hysteresis
Number of Trigger Engines
2
Trigger Engine Combination OR, AND, XOR, software selectable
Trigger Engine Source
CH A, CH B, EXT, Software or None,
independently software selectable for each of
the two Trigger Engines
Hysteresis
±
5% of full-scale input, typical
Trigger sensitivity
±
10% of full scale input range.
This implies that the trigger system may not
trigger reliably if the input has an amplitude
less than
±
10% of full-scale input range
selected
Trigger level accuracy
±10
%, typical, of full-scale input range of the
selected trigger source