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External timing verification
Operational tests
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365-372-304R7.1
Issue 1, November 2007
5 - 1 3
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External timing verification
Description
This test should be performed if the 1665 DMX shelf is going to be externally timed. The
shelf timing cable must be installed and connected between the 1665 DMX shelf and the
office timing source (BITS clock) and the timing source must be active.
Timing verification test procedure
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1
Determine the frame format (SF or ESF) and line code (AMI or B8ZS) of the DS1 timing
signals being generated by the timing source.
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2
Select Configuration -> Timing/Sync.
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3
In the Timing Mode: pull-down, verify External Timing is displayed. If not choose
External and click OK and select Configuration -> Timing/Sync.
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4
Click on the Timing Input Ports tab at the top of the window.
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5
Enter the DS1 Input and Output Format: (SF or ESF) for REF-1 and REF-2.
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6
Enter the DS1 Input Line Code: (AMI or B8ZS) for REF-1 and REF-2.
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7
Click OK.
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8
Select View -> Timing/Sync.
Result:
•
Correct line coding and frame format
•
Provisioned and active timing mode are both external
Summary of Contents for Data Multiplexer Explore 1665
Page 8: ... Contents v i i i 365 372 304R7 1 Issue 1 November 2007 ...
Page 12: ... List of figures x i i 365 372 304R7 1 Issue 1 November 2007 ...
Page 16: ... List of tables x v i 365 372 304R7 1 Issue 1 November 2007 ...
Page 24: ... About this document x x i v 365 372 304R7 1 Issue 1 November 2007 ...
Page 272: ... Final operations Operational tests 5 2 2 365 372 304R7 1 Issue 1 November 2007 ...
Page 326: ... Cleaning pluggable optics modules Fiber cleaning B 1 4 365 372 304R7 1 Issue 1 November 2007 ...
Page 408: ...I N 4 365 372 304R7 1 Issue 1 November 2007 Index ...