Alesis QUADRAVERB, Service Manual

Alesis QuadraVerb Service Manual------ 

2 

08/13/04 

Battery backup is actually more complicated than it might first appear, as it depends on  a 

good system reset (see section 4.2 for details) in order to function properly. The actual backup circuit 
consists of a battery (3V - 3.6V Lithium), a 10K resistor (R61) for checking standby current (see 
below), a "steering" diode (D4), a filter capacitor (C16), and a transistor/resistor/diode combination 
that acts as a steering diode. This combination may be missing  on older board revisions, and must 
be installed (see section 7.0) to prevent data corruption due to a significant difference between Vcc, 
and the amplitude of the data buss. 

SRAM standby current should always be checked. While the unit is off, check the voltage 

across R61. If the voltage is higher than 80mV (specification, although a 1 to 20mV range is more 
normal) then a problem exists. Usually it indicates a bad (or simply wrong) SRAM, or a short, 
somewhere along the MEM PWR line. Note, that for a short time, Sony 58256-PM (high power) 
SRAMs were being installed at the factory, and should be replaced with low power versions (58256-
LP) when found (see section 7.0.), in order to eliminate excess battery drain. We are currently using 
Hitachi 62256ALPs as replacements. 

CAUTION:

Danger of explosion if battery is incorrectly replaced. Replace only with the same type or 

equivalent type recommended by the equipment manufacturer. 
Battery Manufacturer: Tadiran 
Type: TL-5101 
Rating 3.6V 

3.0 Analog Signal Paths 

The inputs (stereo) have their impedances fixed at 1M by R3 and R6. While operating the unit 

monauraly (left input only) the input impedance fixed at 500K (R3, and R6, in parallel). From there, 
the inputs are buffered by U1, A.C. coupled (C1, C2), and passed through a variable (input level), 
X10, gain stage. The stereo signal is then sent to the outputs via the dry VCA (U5). It is also 
summed to mono (Via R17, R18) before being passed along to the anti-aliasing filter (discussed 
later), and the LED control circuit. The LED circuit consists of a rectifier (U4, D2), a fairly standard 
comparator ladder (U7 & associated resistors), and a one shot multivibrator (U24, D3, etc.) to 
provide a time constant so that ASIC math overflow conditions stay highly visible. 

The summed stereo signal, after passing through the anti-aliasing filter, continues into the 

input sample and hold circuit. The input sample and hold circuit consists of 1/3 of the 4053 analog 
switch (U9), the input sample cap (C38), a buffer amplifier (U3), and a comparator (U8). 

The signal beyond this point is purely digital, until the DAC output cycle of the DASP 24. At 

the appropriate time, the DAC will output the processed left, and right signals. This action is 
coordinated with the two output sample and hold circuits (2/3 U9, 2 op amps of U3, C39, C40), so 
that each receives the correct, separate signal for stereo output. After passing through low pass 
filters (2 op amps of U4, Misc. Resistors & Capacitors), the signals are summed with the output of 
the dry VCAs (note that on older board revisions, the signal will pass through the wet VCA [U6] first). 
The signals then pass through another filter section (U2, etc.), to the output potentiometer. From 
here, they pass through unity gain amps (U2, etc.), and finally through impedance fixing resistors R9, 
and R14, to the output jacks. Note that some incompatibilities have been encountered when using 
the QuadraVerb with some particular amplifier effects loops. If the customer is experiencing level 
drops when using the unit in such a setup, it is possible to adjust the output stage gain to 
accommodate the amplifier (see section 7.11).