7. CTCSS, DCS Decoder
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The voice band of the AF output signal from pin 1 of IC120:A is cut by
sharp active filter IC104:A, B and C (VCVS) and amplified, then led to pin
4 of CPU. The input signal is compared with the programmed tone
frequency code in the CPU. The squelch will open when they match.
During DCS, Q108 is ON, C419 is working and cut off frequency is
lowered.
5) Power Supply Circuit
When power supply is ON, there is a “L” signal being inputted to pin 39 (PSW) of CPU which enables the CPU to
work. Then, “H” signal is outputted from pin 41 (C5C) of CPU and drives ON the power supply switch control Q8
and Q7 which turns the 5VS ON. 5VS turns ON the PLL 1C (IC116), main power supply switch Q127 and Q122,
AF POWER IC117 and the 8V of AVR (IC115). During reception, pin 29 (R5) of CPU outputs “H" level, Q124 is ON,
and the reception circuits supplied by 8 V. While during transmission, pin 28 (T5) of CPU outputs "L” level which is
reverse by Q11 so that the output in Q128 will be “H” level, Q123 is ON, and the transmission circuit is supplied by
8 V. Or, in the case when the condition of PLL is UNLOCK, “HJ level is outputted from pin 7 of PLL IC (IC116),
UNLOCK switch Q129 is ON, transmission switch Q 128 is OFF which makes the transmission to stop.
6
Summary of Contents for DR-03T
Page 17: ... ...
Page 18: ...15 L C D Connection TTR3626UPFDHN ...
Page 19: ...2 Top and Front View AA0050 NK0073 18 ...
Page 20: ...3 Bottom View AA0050 ...
Page 21: ...FF0017 1 LCD Assembly EXPLODED VIEW 20 ...
Page 31: ...3 MAIN PA Unit Side A DR M03RI DR 03T UP0584 ...
Page 33: ...SCHEMATIC DIAGRAM 1 CPU Unit DR M03RI DR 03T P O W E R JP3 M03R NC 03T JUMPER fM ACT 0 GG ...
Page 34: ...2 MAIN Unit DR M03RI DR 03T 3 2 ...