ADM-VPX3-9V2 User Manual
3 Functional Description
3.1 Overview
The ADM-VPX3-9V2 is a versatile reconfigurable computing platform with a Virtex Ult VU9P/VU13P
FPGA, 32 reconfigurable VPX lanes and 8 FireFly lanes all capable of 28G/lane, and four banks of 72 bits wide
(for 64 bits with 8 bits ECC) DDR4 memory. The 9V2 also comes with a compact debug board with LEDs, switch,
programming headers, and easy access to the powerful onboard system monitor features.
The ADM-VPX3-9V2 comes with a front access debug board which includes: 8 user LEDs, 4 status LEDs, DIP
switch, Xilinx JTAG programing header, micro usb access to system montior, and factory programing headers.
G
P
IO
G
P
IO
G
P
IO
G
P
IO
G
P
IO
G
P
IO
G
P
IO
G
P
IO
4GB DDR4-2666
72 bits
(5x 16 bit BGA)
4GB DDR4-2666
72 bits
(5x 16 bit BGA)
AVR
uC
PWR
Reg
VS1
VS2
P
0
VS3
VS3
SM2/3
SM0/1
JTAG
JTAG
JT
AG
GA
GA
REF
AUX
A
U
X
R N
P
1
G
D
1
V
B
A
T
M
S
K
R
S
Y
S
C
23
2T
D
23
2R
D
P
2
JTAG
23
2T
D
/
G
P
IO
23
2R
D
/
G
P
IO
R
S
V
D
R
S
V
D
FireFly
B04
Fat Pipe
Fat Pipe
Fat Pipe
FireFly
B04
4GB DDR4-2666
72 bits
(5x 16 bit BGA)
4GB DDR4-2666
72 bits
(5x 16 bit BGA)
Fat Pipe
Fat Pipe
Fat Pipe
Fat Pipe
Fat Pipe
SLR
SLR
SLR
S
LR
S
LR
S
LR
VU9P
B2104
121
123
40 41 42 64 65 66 67
68
47
224
225
226
227
228
229
230
231
232
233
122
120
124
125
126
127
128
46
48
71
70
72
0
SLR
Figure 4 : ADM-VPX3-9V2 VU9P Block Diagram
Page 6
Functional Description
ad-ug-1377_v1_2.pdf
