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AMD-8151™  

HyperTransport™ AGP3.0 
Graphics Tunnel Revision 

Guide

25912

Publication #

3.06

Revision:

March 2006

Issue Date:

Summary of Contents for AMD-8151 HyperTransport AGP3.0

Page 1: ...AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Revision Guide 25912 Publication 3 06 Revision March 2006 Issue Date ...

Page 2: ... including but not limited to the implied warranty of merchantability fitness for a particular purpose or infringement of any intellectual property right AMD s products are not designed intended authorized or warranted for use as compo nents in systems intended for surgical implant into the body or in other applications intended to support or sustain life or in any other application in which the f...

Page 3: ...1 HyperTransport AGP3 0 Graphics Tunnel Revision Guide 25912 Rev 3 06 March 2006 Revision History Date Revision Description March 2006 3 06 Added erratum 28 August 2004 3 04 Added erratum 27 June 2003 3 00 Initial public release ...

Page 4: ...4 Revision History 25912 Rev 3 06 March 2006 AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Revision Guide ...

Page 5: ... provides a detailed description of product errata including potential effects on system operation and suggested workarounds An erratum is defined as a deviation from product specifications and as such may cause the behavior of the AMD 8151 HyperTransport AGP3 0 graphics tunnel to deviate from the published specifications Documentation Support This section which starts on page 15 provides a listin...

Page 6: ... Graphics Tunnel Revision Guide Revision Determination The BIOS checks the PCI revision ID register at DevA 0x08 to determine the version of silicon as shown in Table 1 Table 1 AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Revision IDs Sequence Revision DevA 0x08 DevB 0x08 5 B2 13h ...

Page 7: ...ratum does not apply to the revision Note There may be missing errata numbers Errata that have been resolved from early revisions of the device have been deleted and errata that have been reconsidered may have been deleted or renumbered Table 2 Cross Reference of Product Revision to Errata Errata Numbers and Description Revision Number B2 22 Incorrect Value For DevA 0xA4 Host translation X 23 Link...

Page 8: ...igh state in the graphics tunnel Per the AGP specification this indicates that core logic does not translate host transactions addressed to the Graphics Aperature through the GART However on AMD platforms that use the graphics tunnel such host transactions can be translated through the GART Potential Effect on System None Suggested Workaround Software should presume that this bit is low for the gr...

Page 9: ...properly at 800 MHz Potential Effect on System Transfer of erroneous data and system deadlocks are possible Suggested Workaround The A side link should be configured to operate at 600 MHz instead of 800 MHz Alternatively more restrictive system board layout rules for the A side link may be employed See the AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Motherboard Design Guide order 25617 for deta...

Page 10: ...rite traffic targeting the AGP bridge from the PCI bus through the graphics tunnel to the host back to the graphics tunnel to the AGP bus The combination of such cards and some AGP cards can generate traffic patterns that result in a system deadlock Potential Effect on System The system deadlocks Suggested Workaround Do not support PCI cards that generate peer to peer traffic to the AGP bridge Fix...

Page 11: ...akage Parameter Out Of Spec Description When operating with AGP2 0 signaling the input leakage current ILI is specified to be limited to less than 10 µA However input leakage current may be as much as 20 µA in some graphics tunnel parts Potential Effect on System None Suggested Workaround None required Fix Planned No ...

Page 12: ...26 DevB 0x00 DevID Is Read Only Description The four LSBs of DevB 0x00 DevID should be write once However they are read only instead Potential Effect on System A generic graphics driver may be loaded even if the platform does not support the generic driver Suggested Workaround None required Fix Planned Yes ...

Page 13: ...he AMD 8151 does not master abort a transaction with the HyperTransport COMPAT bit set if all of the following conditions apply HyperTransport link B is connected toward the host HyperTransport link A is the end of chain Potential Effect on System The processor will hang Suggested Workaround Connect the AMD 8151 HyperTransport interface A toward the processor Fix Planned No ...

Page 14: ...tended configuration space The AMD 8151 does not have this MMIO BAR Potential Effect on System The AMD 8151 is not a PCI X Mode 2 or PCI Express capable device and is not required to support the MMIO BAR However using a device with an MMIO BAR and an AMD 8151 on the same HyperTransport link of the processor may cause firmware software problems Suggested Workaround It is strongly recommended that s...

Page 15: ...ation regarding the operation of the AMD 8151 HyperTransport AGP3 0 graphics tunnel AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Data Sheet order 24888 HyperTransport I O Link Specification www hypertransport org See the AMD Web site at www amd com for the latest updates to documents For documents subject to a non disclosure agreement please contact your local sales representative ...

Page 16: ...16 Documentation Support 25912 Rev 3 06 March 2006 AMD 8151 HyperTransport AGP3 0 Graphics Tunnel Revision Guide ...

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