BIOS Consideration Checklist
7
23913A/0—November 2000
Embedded AMD-K6™ Processors BIOS Design Guide
Preliminary Information
Cache Testing
■
The AMD-K6 family of processors does not contain MSRs to
allow for testing of the L1 cache. However, the AMD-K6-2E+,
AMD-K6-III, and AMD-K6-IIIE+ processors do contain an
MSR that allows for testing of their L2 caches. This MSR is
called L2AAR, and it is described in “Level-2 Cache Array
Access Register (L2AAR)” on page 40.
SMM Issues
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The System Management Mode (SMM) functionality of the
processor is the same as the Pentium
®
processor.
■
Implement the processor SMM state-save area in a similar
manner as Pentium processors except for the IDT Base and
possibly Pentium processor-reserved areas. See “System
Management Mode (SMM)” on page 13 for more
information.