March 2011
RP Series
68
14.4.8. *SRE
This command sets the condition of the Service Request Enable Register. This register
determines which bits from the Status Byte Register (see *STB for its bit configuration) are
allowed to set the Master Status Summary (MSS). A 1 in any Service Request Enable
Register bit position enables the corresponding Status Byte Register bit and all such enabled
bits then are logically ORed to cause Bit 6 of the Status Byte Register to be set. See chapter
16 for more details concerning this process.
When the controller conducts a STB? command, the MSS bit is not cleared. When *SRE is
cleared (by programming it with 0), the source cannot generate an MSS bit.
Command Syntax
*SRE <NRf>
Parameters
0 to 255
Default Value
128
Example
*SRE 255
Query Syntax
*SRE?
Returned Parameters
<NR1>(Register binary value)
Related Commands
*ESE *ESR
14.4.9. *STB?
This query reads the Status Byte register, which contains the status summary bits and the
Output Queue MAV bit. Reading the Status Byte register does not clear it. The input
summary bits are cleared when the appropriate event registers are read (see Section 16 for
more information).
Table 15: Bit Configuration of Status Byte Register
Bit Position
7
6
5
4
3
2 - 0
Bit Name
OPER
MSS
ESB
MAV
QUES
not used
Bit Weight
128
64
32
16
8
OPER
operation status summary
MSS
master status summary
ESB
event status byte summary
QUES
questionable status summary
MAV
message available
Query Syntax
*STB?
Returned Parameters
<NR1> (Register binary value)
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