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AD9643/AD9613/AD6649/AD6643 User Guide 

UG-293

 

Rev. A | Page 3 of 26 

EVALUATION BOARD HARDWARE 

The 

AD9643

AD9613

AD6649

, or 

AD6643

 evaluation board 

provides all of the support circuitry required to operate these 
devices in their various modes and configurations. Figure 2 shows 
the typical bench characterization setup used to evaluate the ac 
performance of the 

AD9643

AD9613

AD6649

, or 

AD6643

. It is 

critical that the signal sources used for the analog input and the 
clock have very low phase noise (<1 ps rms jitter) to achieve the 
optimum performance of the signal chain. Proper filtering of 
the analog input signal to remove harmonics and lower the inte-
grated or broadband noise at the input is necessary to achieve 
the specified noise performance. 

See the Evaluation Board Software Quick Start Procedures section 
to get started, and see Figure 23 to Figure 34 for the complete 
schematics and layout diagrams. These diagrams demonstrate 
the routing and grounding techniques that should be applied at 
the system level when designing application boards using these 
converters. 

POWER SUPPLIES 

This evaluation board comes with a wall-mountable switching 
power supply that provides a 6 V, 2 A maximum output. Connect 
the supply to a rated 100 V ac to 240 V ac wall outlet at 47 Hz  
to 63 Hz. The output from the supply is provided through a 
2.1 mm inner diameter jack that connects to the printed circuit 
board (PCB) at P201. The 6 V supply is fused and conditioned 
on the PCB before connecting to the low dropout (LDO) linear 
regulators (default configuration) that supply the proper bias to 
each of the various sections on the board.  

The evaluation board can be powered in a nondefault condition 
using external bench power supplies. To do this, remove the 
jumpers on the P103, P104, P107, P108, and P105 header pins to 
disconnect the outputs from the on-board LDO regulators, which 
enables the user to bias each section of the board individually. 
Use P202 and P203 to connect a different supply for each section. 
A 1.8 V supply is needed with a 1 A current capability for 
DUT_AVDD and DRVDD; however, it is recommended that 
separate supplies be used for both analog and digital domains. 
An additional supply is also required to supply 1.8 V for digital 
support circuitry on the board, DVDD. This supply must also 
have a 1 A current capability and can be combined with DRVDD 
with little or no degradation in performance. To operate the 
evaluation board using the SPI and alternate clock options, a 
separate 3.3 V analog supply is needed in addition to the other 
supplies. This 3.3 V supply, or 3P3V_ANALOG, must have a 
1 A current capability. This 3.3 V supply is also used to support 
the optional input path amplifier (

ADL5202

) on Channel A and 

Channel B. 

INPUT SIGNALS 

When connecting the clock and analog source, use clean signal 
generators with low phase noise, such as the Rohde & Schwarz 
SMA or HP 8644B signal generators or an equivalent. Use a 1 m, 
shielded, RG-58, 50 Ω coaxial cable for connecting to the evalua-
tion board. Enter the desired frequency and amplitude (see the 
Specifications section in the data sheet of the respective device). 

 

ANALOG INPUT

PC

RUNNING ADC

ANALYZER

OR VISUAL ANALOG

USER SOFTWARE

SWITCHING

POWER

SUPPLY

SWITCHING

POWER

SUPPLY

6V DC

2A MAX

6V DC

2A MAX

WALL OUTLET

100V TO 240V AC

47Hz TO 63Hz

SIGNAL

SYNTHESIZER

ANALOG INPUT

SIGNAL

SYNTHESIZER

OPTIONAL CLOCK SOURCE

SIGNAL

SYNTHESIZER

09

94

0-

00

2

 

Figure 2. Evaluation Board Connection 

 

Summary of Contents for AD6643

Page 1: ...PGA based data capture kit SOFTWARE NEEDED VisualAnalog SPI controller DOCUMENTS NEEDED AD9643 AD9613 AD6649 or AD6643 data sheet HSC ADC EVALCZ data sheet AN 905 Application Note VisualAnalog Converter Evaluation Tool Version 1 0 User Manual AN 878 Application Note HighSpeedADCSPIControlSoftware AN 877 Application Note InterfacingtoHighSpeedADCsviaSPI AN 835 Application Note UnderstandingADCTesti...

Page 2: ...ut Signals 4 Default Operation and Jumper Selection Settings 4 Evaluation Board Software Quick Start Procedures 6 Configuring the Board 6 Using the Software for Testing 6 Evaluation Board Schematics and Artwork 14 Ordering Information 23 Bill of Materials 23 Related Links 26 REVISION HISTORY 11 14 Rev 0 to Rev A Change to Equipment Needed Section 1 Changes to Configuring the Board Section 6 Change...

Page 3: ...ard The evaluation board can be powered in a nondefault condition using external bench power supplies To do this remove the jumpers on the P103 P104 P107 P108 and P105 header pins to disconnect the outputs from the on board LDO regulators which enables the user to bias each section of the board individually Use P202 and P203 to connect a different supply for each section A 1 8 V supply is needed w...

Page 4: ...L5202 can be configured in many different ways depending on the application therefore the parts in the input and output path are left unpopulated See the ADL5202 data sheet for additional information on this device and for configuring the inputs and outputs The ADL5202 by default is held in power down mode but can be enabled by adding 1 kΩ resistors at R427 and R428 to enable Channel A and Channel...

Page 5: ...rd Schematics and Artwork and the Bill of Materials sections for specific recommendations for device values 1 Install R204 and R221 to enable the ADP2114 2 Install R216 and R218 3 Install L201 and L202 4 Remove JP201 and JP203 5 Remove jumpers from across Pin 1 and Pin 2 on P107 and P108 respectively 6 Place jumpers across Pin 1 and Pin 2 of P106 and P109 respectively Making these changes enables ...

Page 6: ...ate center frequency Analog Devices uses TTE Allen Avionics and K L band pass filters USING THE SOFTWARE FOR TESTING Setting Up the ADC Data Capture After configuring the board set up the ADC data capture using the following steps 1 Open VisualAnalog on the connected PC The appro priate device type should be listed in the status bar of the VisualAnalog New Canvas window Select the template that co...

Page 7: ... Start menu or by double clicking the SPIController software desktop icon If prompted for a configuration file select the appropriate one If not check the title bar of the window to determine which configuration is loaded If necessary choose Cfg Open from the File menu and select the appropriate file based on your device type Note that the CHIP ID 1 field should be filled to indicate whether the c...

Page 8: ...n Note Interfacing to High Speed ADCs via SPI for additional information 4 Note that other settings can be changed on the ADCBase 0 tab see Figure 11 and the ADC A and ADC B tabs see Figure 10 to set up the device in the desired mode The settings on the ADCBase 0 tab affect the entire device whereas the settings on the ADC A and ADC pages affect the selected channel only See the appropriate device...

Page 9: ...section the Fir Low Latency Mode En checkbox must be selected and the Low Latency NCO Fs 4 Only option must be selected under the MISC EXTRA 5A section The second mode uses a 100 MHz FIR filter and a tunable frequency NCO see Figure 13 In this mode the High Latency NCO option under MISC EXTRA 5A must be selected and the Fir Low Latency Mode En checkbox must be cleared under the MAIN 50 section 099...

Page 10: ...Figure 14 The NSR Enable checkbox must be selected under the NOISE SHAPED REQUANTIZER 1 3C section This enables the circuitry in the AD6643 To select the bandwidth mode select 0 for 22 and 1 for 33 under the NSR Mode drop down box in the NOISE SHAPED REQUANTIZER 1 3C section Upon selecting the bandwidth mode select the desired tuning word in the NSR Tuning drop down box under the NOISE SHAPED REQU...

Page 11: ... the left panel of the VisualAnalog Graph window See Figure 17 2 Repeat this procedure for Channel B if desired 3 Click the Save disk icon within the Graph window to save the performance plot data as a csv formatted file See Figure 16 for an example 0 20 THIRD HARMONIC SECOND HARMONIC 40 60 80 100 120 140 10 0 20 30 40 50 60 70 80 90 100 110 120 FREQUENCY MHz AMPLITUDE dBFS 250MSPS 90 1MHz 1dBFS S...

Page 12: ...dBFS input signal see Figure 19 09940 018 Figure 18 Visual Graph Window of VisualAnalog AD6649 95 MHz FIR Filter and Fixed Frequency NCO Mode 09940 019 Figure 19 Visual Graph Window of VisualAnalog AD6649 100 MHz FIR Filter and Tunable Frequency NCO Mode 5 Repeat Step 3 to save the graph in a csv file format 6 If operating the AD6643 with NSR enabled certain options in VisualAnalog must be enabled...

Page 13: ...binary by default Repeat for the other channel If the FFT appears normal but the performance is poor check the following Make sure that an appropriate filter is used on the analog input Make sure that the signal generators for the clock and the analog input are clean low phase noise Change the analog input frequency slightly if noncoherent sampling is being used Make sure that the SPI configuratio...

Page 14: ...UG 293 AD9643 AD9613 AD6649 AD6643 User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK 09940 023 Figure 23 DUT and Related Circuits Rev A Page 14 of 26 ...

Page 15: ...AD9643 AD9613 AD6649 AD6643 User Guide UG 293 09940 024 Figure 24 Board Power Input and Supply Rev A Page 15 of 26 ...

Page 16: ...UG 293 AD9643 AD9613 AD6649 AD6643 User Guide 09940 025 Figure 25 Passive Analog Input Circuits Rev A Page 16 of 26 ...

Page 17: ...AD9643 AD9613 AD6649 AD6643 User Guide UG 293 09940 026 Figure 26 Optional Active Input Circuits Rev A Page 17 of 26 ...

Page 18: ...UG 293 AD9643 AD9613 AD6649 AD6643 User Guide 09940 027 Figure 27 Default and Optional Clock Input Circuits Rev A Page 18 of 26 ...

Page 19: ...AD9643 AD9613 AD6649 AD6643 User Guide UG 293 09940 028 Figure 28 SPI Configuration Circuit and FIFO Board Connector Circuit Rev A Page 19 of 26 ...

Page 20: ...UG 293 AD9643 AD9613 AD6649 AD6643 User Guide 09940 029 Figure 29 Top Side 09940 030 Figure 30 Ground Plane Layer 2 Rev A Page 20 of 26 ...

Page 21: ...AD9643 AD9613 AD6649 AD6643 User Guide UG 293 09940 031 Figure 31 Power Plane Layer 3 09940 032 Figure 32 Power Plane Layer 4 Rev A Page 21 of 26 ...

Page 22: ...UG 293 AD9643 AD9613 AD6649 AD6643 User Guide 09940 033 Figure 33 Ground Plane Layer 5 09940 034 Figure 34 Bottom Side Rev A Page 22 of 26 ...

Page 23: ...2 Murata GRM1555C1H3R9CZ01D 13 4 C303 C304 C309 C310 8 2 pF capacitor ceramic NP0 0402 YAGEO 0402CG829D9B200 14 8 C410 C412 C524 C525 C526 C527 C530 C534 10 µF capacitor ceramic monolithic Murata GRM21BR61C106KE15L 15 2 C503 C508 0 33 µF capacitor ceramic X5R Murata GRM155R61A334KE15D 16 1 C510 0 001 µF capacitor ceramic monolithic Murata GRM155R71H102KA01D 17 3 C511 C512 C513 0 47 µF capacitor ch...

Page 24: ...4 R313 R314 R333 R334 36 Ω resistor film SMD 0402 Panasonic ERJ 2GEJ360X 52 4 R315 R316 R335 R336 15 0 Ω resistor film SMD 0402 Panasonic ERJ 2RFK15R0X 53 8 R317 R318 R337 R338 R501 R503 R505 R604 49 9 Ω resistor PREC thick film chip R0402 Panasonic ERJ 2RKF49R9X 54 13 R510 R511 R524 R525 R526 R527 R531 R532 R535 R536 R544 R545 R546 100 Ω resistor PREC thick film chip R0201 Panasonic ERJ 1GEF1000C...

Page 25: ... R410 R411 R414 R415 R508 R533 R534 R538 R541 R542 R608 R630 R631 R632 0 Ω resistor film SMD 0402 Panasonic ERJ 2GE0R00X 831 R215 R220 TBD_R0603 841 R405 R408 130 Ω resistor PREC thick film chip R0402 Panasonic ERJ 2RKF1300X 851 R412 R426 R443 R444 150 Ω resistor ultra PREC ultrareliability MF chip Susumu RG1005P 151 B T5 861 R433 R446 1 kΩ resistor ultra PREC ultrareliability MF chip Susumu RG100...

Page 26: ...iliates and in house consultants The Evaluation Board is NOT sold to Customer all rights not expressly granted herein including ownership of the Evaluation Board are reserved by ADI CONFIDENTIALITY This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI Customer may not disclose or transfer any portion of the Evaluation Board to any other...

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