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Rev 05 Jun 2013 16:37 | Page 3

Configuring the Board

Before using the software for testing, configure the evaluation board as follows:

Connect the evaluation board to the data capture board, as shown in Figure 1.

1.

Connect one 6 V, 2.5 A switching power supply (such as the CUI, Inc., EPS060250UH-PHP-SZ that is

2.

supplied) to the 

AD9683-170EBZ

AD9683-250EBZ

, or 

AD6677

.

Connect one 12 V, 3.3 A switching power supply (such as the supplied V-Infinity

3.

ETSA120330UDC-PFP-SZ) to the 

HSC-ADC-EVALCZ

 board.

Connect the 

HSC-ADC-EVALDZ

 board (P702) to the PC using a USB cable.

4.

On the ADC evaluation board, confirm that the jumpers are installed at P202, P209, P204, P205,

5.

P206, and P210 as shown in Figure 2 and Table 1.
On the ADC evaluation board, use a clean signal generator with low phase noise to provide an

6.

input signal to the 

AD9683

 analog input. Use a 1 m, shielded, RG-58, 50 Ω coaxial cable to connect

the signal generator. For best results, use a narrow-band, band-pass filter with 50 Ω terminations
and an appropriate center frequency. (Analog Devices, Inc., uses TTE, Allen Avionics, and K&L
band-pass filters.)

Evaluation Board Hardware

The evaluation board provides the support circuitry required to operate the 

AD9683

 and 

AD6677

 in

their various modes and configurations. Figure 1 shows the typical bench characterization setup used
to evaluate AC performance. It is critical that the signal sources used for the analog input and clock
have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the signal chain.
Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband
noise at the input is necessary to achieve the specified noise performance.

See the evaluation board pages linked from the 

AD9683

 and 

AD6677

 product pages for the complete

schematics and bill of materials (BOM). The evaluation board layout is available upon request. The
layout diagrams demonstrate the routing and grounding techniques that should be applied at the
system level when designing application boards using these converters.

Power Supplies

This evaluation board comes with a wall-mountable switching power supply that provides a 6 V, 2 A
maximum output. Connect the supply to a 100 V ac to 240 V ac, 47 Hz to 63 Hz wall outlet. The
output from the supply is provided through a 2.1 mm inner diameter jack that connects to the printed
circuit board (PCB) at P201. The 6 V supply is fused and conditioned on the PCB before connecting to
the low dropout linear regulators that supply the proper bias to each of the various sections on the
board.

The evaluation board can be powered in a nondefault condition using external bench power supplies.
To do this, remove the all the jumpers listed above (and in Table 1) to disconnect the outputs from
the on-board LDOs. This enables the user to bias each section of the board individually. Use P1, P208,

Summary of Contents for AD6677

Page 1: ...ich provide all of the support circuitry required to operate these parts in their various modes and configurations The application software used to interface with the devices is also described The AD9...

Page 2: ...ter Evaluation Tool Version 1 0 User Manual AN 878 Application Note High Speed ADC SPI Control Software AN 877 Application Note Interfacing to High Speed ADCs via SPI AN 835 Application Note Understan...

Page 3: ...erformance It is critical that the signal sources used for the analog input and clock have very low phase noise 1 ps rms jitter to realize the optimum performance of the signal chain Proper filtering...

Page 4: ...ion in the data sheet of the respective part When connecting the analog input source use of a multipole narrow band band pass filter with 50 terminations is recommended Analog Devices uses band pass f...

Page 5: ...utput drivers of the AD9683 and AD6677 P205 This jumper connects the AVDD power supply domain of the AD9683 and AD6677 P206 This jumper connects the DVDD power supply domain of the AD9683 and AD6677 P...

Page 6: ...onnect the active path using the ADL5202 a few resistors need to be changed First remove C305 and C306 Then populate R311 and R312 These changes disconnect the passive input and connect the output of...

Page 7: ...may also be set up to be clocked from the AD9525 PDWN To enable the power down feature add a shorting jumper across P3 directly to the right of P209 at Pin 1 and Pin 2 to connect the PDWN pin to DRVD...

Page 8: ...e used 2 to program the FPGA see Figure 4 Click Yes and the window closes Figure 4 VisualAnalog Default Configuration Message Click the Settings button on the ADC Data Capture block In the pop up wind...

Page 9: ...m right corner of the window see Figure 6 to see what is shown in Figure 7 Change the features and capture settings by consulting the detailed instructions in the AN 905 2 Application Note VisualAnalo...

Page 10: ...tware by going to the Start menu or by double clicking the 1 SPIController software desktop icon If prompted for a configuration file select the appropriate one If not check the title bar of the windo...

Page 11: ...Rev 05 Jun 2013 16 37 Page 11 Figure 8 SPI Controller CHIP ID 1 Box Click the New DUT button in the SPIController window see Figure 9 2...

Page 12: ...divider use the drop down box to select the correct clock divide ratio if necessary The Nyquist Clock is selected by default If using the RF Clock make sure to configure the device in this tab For ad...

Page 13: ...to set up the part in the desired mode The ADCBase0 tab settings affect ADC settings whereas the settings on the ADCBase1 and ADCBase2 tabs affect the JESD204B link settings See the appropriate part d...

Page 14: ...Rev 05 Jun 2013 16 37 Page 14 Figure 11 SPI Controller Example ADCBase1 Page...

Page 15: ...led in Red in VisualAnalog Toolbar Collapsed Display Adjusting the Amplitude of the Input Signal The next step is to adjust the amplitude of the input signal for each channel as follows Adjust the amp...

Page 16: ...Typical FFT AD9253 Troubleshooting Tips If the FFT plot appears abnormal do the following If you see an abnormal noise floor go to the ADCBase0 tab of the SPIController window and toggle the Chip Powe...

Page 17: ...curely connected to the HSC ADC EVALDZ board Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on the HSC ADC EVALDZ board If this LED is not illuminated make s...

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