Analog Devices AD6677 Manual Download

Page: 8 / 17

Rev 05 Jun 2013 16:37 | Page 8

Figure 3. VisualAnalog, New

Canvas Window
After the template is selected, a message appears asking if the default configuration can be used

to program the FPGA (see Figure 4). Click Yes, and the window closes.

Figure 4. VisualAnalog Default

Configuration Message
Click the Settings button on the ADC Data Capture block. In the pop-up window select the

Capture Board tab. Select the checkbox Poll Full Flag. This must be checked in order to get
data capture from the

Summary of Contents for AD6677

Page 1: ...ich provide all of the support circuitry required to operate these parts in their various modes and configurations The application software used to interface with the devices is also described The AD9...

Page 2: ...ter Evaluation Tool Version 1 0 User Manual AN 878 Application Note High Speed ADC SPI Control Software AN 877 Application Note Interfacing to High Speed ADCs via SPI AN 835 Application Note Understan...

Page 3: ...erformance It is critical that the signal sources used for the analog input and clock have very low phase noise 1 ps rms jitter to realize the optimum performance of the signal chain Proper filtering...

Page 4: ...ion in the data sheet of the respective part When connecting the analog input source use of a multipole narrow band band pass filter with 50 terminations is recommended Analog Devices uses band pass f...

Page 5: ...utput drivers of the AD9683 and AD6677 P205 This jumper connects the AVDD power supply domain of the AD9683 and AD6677 P206 This jumper connects the DVDD power supply domain of the AD9683 and AD6677 P...

Page 6: ...onnect the active path using the ADL5202 a few resistors need to be changed First remove C305 and C306 Then populate R311 and R312 These changes disconnect the passive input and connect the output of...

Page 7: ...may also be set up to be clocked from the AD9525 PDWN To enable the power down feature add a shorting jumper across P3 directly to the right of P209 at Pin 1 and Pin 2 to connect the PDWN pin to DRVD...

Page 8: ...e used 2 to program the FPGA see Figure 4 Click Yes and the window closes Figure 4 VisualAnalog Default Configuration Message Click the Settings button on the ADC Data Capture block In the pop up wind...

Page 9: ...m right corner of the window see Figure 6 to see what is shown in Figure 7 Change the features and capture settings by consulting the detailed instructions in the AN 905 2 Application Note VisualAnalo...

Page 10: ...tware by going to the Start menu or by double clicking the 1 SPIController software desktop icon If prompted for a configuration file select the appropriate one If not check the title bar of the windo...

Page 11: ...Rev 05 Jun 2013 16 37 Page 11 Figure 8 SPI Controller CHIP ID 1 Box Click the New DUT button in the SPIController window see Figure 9 2...

Page 12: ...divider use the drop down box to select the correct clock divide ratio if necessary The Nyquist Clock is selected by default If using the RF Clock make sure to configure the device in this tab For ad...

Page 13: ...to set up the part in the desired mode The ADCBase0 tab settings affect ADC settings whereas the settings on the ADCBase1 and ADCBase2 tabs affect the JESD204B link settings See the appropriate part d...

Page 14: ...Rev 05 Jun 2013 16 37 Page 14 Figure 11 SPI Controller Example ADCBase1 Page...

Page 15: ...led in Red in VisualAnalog Toolbar Collapsed Display Adjusting the Amplitude of the Input Signal The next step is to adjust the amplitude of the input signal for each channel as follows Adjust the amp...

Page 16: ...Typical FFT AD9253 Troubleshooting Tips If the FFT plot appears abnormal do the following If you see an abnormal noise floor go to the ADCBase0 tab of the SPIController window and toggle the Chip Powe...

Page 17: ...curely connected to the HSC ADC EVALDZ board Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on the HSC ADC EVALDZ board If this LED is not illuminated make s...