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Rev 13 May 2013 17:57 | Page 6

Power

Plug the switching power supply into a wall outlet rated at 100 V ac to 240 V ac, 47 Hz to 63 Hz.
Connect the DC output connector to P101 on the evaluation board.

Analog Input

The four channel inputs on the evaluation board are set up for a double balun-coupled analog input
with a 50 Ω impedance. The default analog input configuration supports analog input frequencies of
up to ~200 MHz.

VREF

The default VREF configuration is to connect the SENSE pin to AGND for internal VREF operation. This
is done by connecting Pin 3 to Pin 5 on Header J202. An external reference voltage can be provided to
the 

AD9653

AD9253

 and 

AD9633

. Connecting Pin 2 to Pin 1 on Header J202 puts the ADC in a mode

where it requires a reference voltage from an external source. The external on-board 1.0 V reference
is provided by the 

ADR130

. This external reference can be connected to the ADC by connecting Pin 4

to Pin 6 on Header J202. Alternatively, if an external off-board reference is desired, connect Pin 2 to
Pin1 on Header J202 and apply the reference voltage directly to Pin 4 of Header J202. The AD9653 can
accommodate reference voltages from 1.0 V to 1.3 V; the AD9253 and AD9633 reference voltage is
specified to be 1.0 V.

RBIAS

RBIAS has a default setting of 10 kΩ (R205) to ground and is used to set the ADC core bias current.
Note that using a resistor value other than a 10 kΩ, 1% resistor for RBIAS may degrade the
performance of the device.

Clock

The default clock input circuit is derived from a simple transformer-coupled circuit using a high
bandwidth 1:1 impedance ratio transformer (T801/T802) that adds a low amount of jitter to the clock
path. The clock input is 50 Ω terminated and ac-coupled to handle single-ended sine wave types of
inputs. The transformer converts the single-ended input to a differential signal that is clipped by

Summary of Contents for AD9253

Page 1: ...perate these parts in their various modes and configurations The application software used to interface with the devices is also described The AD9653 AD9253 and AD9633 data sheets provide additional i...

Page 2: ...878 Application Note High Speed ADC SPI Control Software AN 877 Application Note Interfacing to High Speed ADCs via SPI AN 835 Application Note Understanding ADC Testing and Evaluation Design and Inte...

Page 3: ...1 shows the typical bench characterization setup used to evaluate AC performance It is critical that the signal sources used for the analog input and clock have very low phase noise 1 ps rms jitter to...

Page 4: ...e desired frequency and amplitude see the Specifications section in the data sheet of the respective part When connecting the analog input source use of a multipole narrow band band pass filter with 5...

Page 5: ...ate reference voltages from 1 0 V to 1 3 V the AD9253 and AD9633 reference voltage is specified to be 1 0 V J204 Use this jumper to power down the ADC Using the SPI the PDWN pin can be configured to b...

Page 6: ...ovided by the ADR130 This external reference can be connected to the ADC by connecting Pin 4 to Pin 6 on Header J202 Alternatively if an external off board reference is desired connect Pin 2 to Pin1 o...

Page 7: ...J802 labeled CLK PDWN To enable the power down feature add a shorting jumper across J204 at Pin 1 and Pin 2 to connect the PDWN pin to DRVDD Modes of Operation Standalone PIN Mode The AD9653 AD9253 AD...

Page 8: ...pe should be listed in the status 1 bar of the VisualAnalog New Canvas window Select the template that corresponds to the type of testing to be performed see Figure 3 where the AD9253 is shown as an e...

Page 9: ...lay Evaluation And Test Setting up the SPI Controller Software After the ADC data capture board setup is complete set up the SPI controller software using the following procedure Open the SPI controll...

Page 10: ...In the ADCBase 0 tab of the SPIController window find the CLOCK DIVIDE B box see Figure 3 9 If using the clock divider use the drop down box to select the correct clock divide ratio if necessary For...

Page 11: ...he selected channel only See the appropriate part data sheet the AN 878 Application Note High Speed ADC SPI Control Software and the AN 877 Application Note Interfacing to High Speed ADCs via SPI for...

Page 12: ...el D 2 Click the disk icon within the VisualAnalog Graph AD9253 FFT window to save the 3 performance plot data as a csv formatted file See Figure 13 for an example Figure 13 Typical FFT AD9253 Trouble...

Page 13: ...do the following Make sure that the evaluation board is securely connected to the HSC ADC EVALCZ board Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on the...

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