Rev 13 Nov 2013 00:23 | Page 15
In VisualAnalog, click the Settings icon in the Input Formatter block. Check that Number
●
Format is set to the correct encoding (twos complement by default). Check that the Number
Format in the VisualAnalog Input Formatter matches the data format selected in the
SPIController ADCBase0 OUTPUT MODE(14) window. Repeat for the other channels.
If the FFT appears normal but the performance is poor, check the following:
Make sure that an appropriate filter is used on the analog input.
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Make sure that the signal generators for the clock and the analog input are clean (low phase noise).
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Change the analog input frequency slightly if noncoherent sampling is being used.
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Make sure that the SPI configuration file matches the product being evaluated.
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If the FFT window remains blank after Run in VisualAnalog (see Figure 12) is clicked, do the following:
Make sure that the evaluation board is securely connected to the
board.
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Make sure that the FPGA has been programmed by verifying that the DONE LED is illuminated on
●
board. If this LED is not illuminated, make sure that the U4 switch on the
board is in the correct position for USB CONFIG.
Make sure that the correct FPGA program was installed by clicking the Settings icon in the ADC
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Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA bin
file is selected for the part.
If VisualAnalog indicates that the FIFO Capture timed out, do the following:
Make sure that all power and USB connections are secure.
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Probe the DCO signal at P802 (Pin A10 and/or Pin B10) on the evaluation board, and confirm that a
●
clock signal is present at the ADC sampling rate.
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