Rev 03 Jun 2015 18:39 | Page 3
Sample clock source (if not using the on-board oscillator)
●
2 switching power supplies (6.0 V, 2.5 A), CUI EPS060250UH-PHP-SZ (or equivalent), provided
●
PC running Windows®
●
USB 2.0 port
●
,
,
board
●
FPGA-based data capture kit
●
Getting Started
This section provides quick start procedures for using the
Configuring the Board
Before using the software for testing, configure the evaluation board as follows:
Connect the evaluation board to the data capture board, as shown in Figure 1. The
,
1.
,
are all pin compatible and use the same evaluation board.
Connect one 6 V, 2.5 A switching power supply (such as the CUI, Inc., EPS060250UH-PHP-SZ (or
2.
equivalent) that is supplied) to the
.
Connect one 6 V, 2.5 A switching power supply (such as the supplied CUI EPS060250UH-PHP-SZ (or
3.
board (J6) to the PC using a USB cable. Check that the jumper on J9
4.
is in the 2.5V position.
On the ADC evaluation board, confirm that the jumpers are installed as shown in Figure 2. The
5.
configuration in Figure 2 enables SPI control of the device, with the onboard crystal oscillator
enabled and utilizing the on-chip voltage reference.
On the ADC evaluation board, use a clean signal generator with low phase noise to provide an
6.
input signal to the Input SMA Connector J502. Use a shielded, RG-58, 50 Ω coaxial cable (optimally
1 m or shorter) to connect to the signal generator. For best results, use a narrow-band, band-pass
filter with 50 Ω terminations and an appropriate center frequency. (Analog Devices uses TTE, Allen
Avionics, and K&L band-pass filters.)
The evaluation board has an 80 MHz Valpey Fisher oscillator (VFAC3HL-80MHZ) that is enabled by
7.
jumpering J605 Pin 1 to J605 Pin 2. However, if the user provides an external clock source, provide
a clean, low jitter clock source to Connector J602 at the desired ADC conversion rate. Move the
jumper on J605 to connect Pin 2 to Pin 3 to override the built-in oscillator, and remove C610 to
disconnect the oscillator from the external clock source. The input clock level should be between
10 dBm and 14 dBm.
Evaluation Board Hardware
The evaluation board provides the support circuitry required to operate the
in
