ADV7181B
Rev. B | Page 23 of 100
SD_SAT_Cr[7:0] SD Saturation Cr Channel, Address
0xE4[7:0]
This register allows the user to control the gain of the Cr
channel only, which in turn adjusts the saturation of the picture.
Table 23. SD_SAT_Cr Function
SD_SAT_Cr[7:0] Description
0x80 (default)
Gain on Cr channel = 0 dB
0x00
Gain on Cb channel = −42 dB
0xFF
Gain on Cb channel = +6 dB
SD_OFF_Cb[7:0] SD Offset Cb Channel, Address
0xE1[7:0]
This register allows the user to select an offset for the Cb
channel only and adjust the hue of the picture. There is a
functional overlap with the Hue[7:0] register.
Table 24. SD_OFF_Cb Function
SD_OFF_Cb[7:0] Description
0x80 (default)
0 offset applied to the Cb channel
0x00
−312 mV offset applied to the Cb channel
0xFF
+312 mV offset applied to the Cb channel
SD_OFF_Cr[7:0] SD Offset Cr Channel, Address
0xE2[7:0]
This register allows the user to select an offset for the Cr channel
only and adjust the hue of the picture. There is a functional
overlap with the Hue[7:0] register.
Table 25. SD_OFF_Cr Function
SD_OFF_Cr[7:0] Description
0x80 (default)
0 offset applied to the Cr channel
0x00
−312 mV offset applied to the Cr channel
0xFF
+312 mV offset applied to the Cr channel
BRI[7:0] Brightness Adjust, Address 0x0A[7:0]
This register controls the brightness of the video signal. It
allows the user to adjust the brightness of the picture.
Table 26. BRI Function
BRI[7:0] Description
0x00 (default)
Offset of the luma channel = 0IRE
0x7F
Offset of the luma channel = +100IRE
0x80
Offset of the luma channel = –100IRE
HUE[7:0] Hue Adjust, Address 0x0B[7:0]
This register contains the value for the color hue adjustment.
It allows the user to adjust the hue of the picture.
HUE[7:0] has a range of ±90°, with 0x00 equivalent to an
adjustment of 0°. The resolution of HUE[7:0] is 1 bit = 0.7°.
The hue adjustment value is fed into the AM color demodula-
tion block. Therefore, it applies only to video signals that contain
chroma information in the form of an AM-modulated carrier
(CVBS or Y/C in PAL or NTSC). It does not affect SECAM and
does not work on component video inputs (YPrPb).
Table 27. HUE Function
HUE[7:0] Description
(Adjust Hue of the Picture)
0x00 (default)
Phase of the chroma signal = 0°
0x7F
Phase of the chroma signal = –90°
0x80
Phase of the chroma signal = +90°
DEF_Y[5:0] Default Value Y, Address 0x0C[7:2]
When the ADV7181B loses lock on the incoming video signal
or when there is no input signal, the DEF_Y[5:0] register allows
the user to specify a default luma value to be output. This value
is used under the following conditions:
•
If DEF_VAL_AUTO_EN bit is set to high and the
ADV7181B lost lock to the input video signal. This is
the intended mode of operation (automatic mode).
•
The DEF_VAL_EN bit is set, regardless of the lock
status of the video decoder. This is a forced mode that
may be useful during configuration.
The DEF_Y[5:0] values define the 6 MSBs of the output video.
The remaining LSBs are padded with 0s. For example, in 8-bit
mode, the output is Y[7:0] = {DEF_Y[5:0], 0, 0}.
DEF_Y[5:0] is 0x0D (blue) is the default value for Y.
Register 0x0C has a default value of 0x36.
DEF_C[7:0] Default Value C, Address 0x0D[7:0]
The DEF_C[7:0] register complements the DEF_Y[5:0] value.
It defines the 4 MSBs of Cr and Cb values to be output if
•
The DEF_VAL_AUTO_EN bit is set high and the
ADV7181B cannot lock to the input video (automatic
mode).
•
DEF_VAL_EN bit is set to high (forced output).
The data that is finally output from the ADV7181B for the
chroma side is Cr[7:0] = {DEF_C[7:4], 0, 0, 0, 0}, Cb[7:0] =
{DEF_C[3:0], 0, 0, 0, 0}.
DEF_C[7:0] is 0x7C (blue) is the default value for Cr and Cb.
