ADV7181B
Rev. B | Page 40 of 100
PF Polarity FIELD, Address 0x37[3]
The polarity of the FIELD pin can be inverted using the PF bit.
The FIELD pin can be inverted using the PF bit.
When PF is 0 (default), FIELD is active high.
When PF is 1, FIELD is active low.
OUTPUT
VIDEO
FIELD 1
FIELD 2
H
V
F
OUTPUT
VIDEO
H
V
F
525
1
2
3
4
5
6
7
8
9
10
11
12
13
19
20
21
22
NVBEG[4:0] = 0x5
NVBEG[4:0] = 0x5
NVEND[4:0] = 0x4
NVEND[4:0] = 0x4
NFTOG[4:0] = 0x3
NFTOG[4:0] = 0x3
1
BT.656-4
REG 0x04, BIT 7 = 1
1
BT.656-4
REG 0x04, BIT 7 = 1
1
APPLIES IF NEWAVMODE = 0:
MUST BE MANUALLY SHIFTED IF NEWAVMODE = 1.
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
283
284
285
04984-020
Figure 20. NTSC Default (BT.656). The Polarity of H, V, and F is Embedded in the Data.
NVBEG[4:0] = 0x0
NVEND[4:0] = 0x3
FIELD 1
OUTPUT
VIDEO
FIELD
OUTPUT
HS
OUTPUT
NFTOG[4:0] = 0x5
VS
OUTPUT
525
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
21
22
FIELD 2
OUTPUT
VIDEO
FIELD
OUTPUT
HS
OUTPUT
VS
OUTPUT
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
284
285
NVBEG[4:0] = 0x0
NVEND[4:0] = 0x3
NFTOG[4:0] = 0x5
04984-021
Figure 21. NTSC Typical Vsync/Field Positions Using Register Writes in Table 55
