ADV8003 Hardware Manual
Rev. B, August 2013
180
The input video to the PtoI block is defined using
for more details on the value of this register.
m_p2i_vid[7:0]
, Secondary VSP Map,
Address 0xE64B[7:0]
'This register is used to set the VIC of the PtoI in VSP_top.
Function
m_p2i_vid[7:0]
Description
0x00
Default
Table 30: VID Set to PtoI
Input Timing Format to
P2I
576p
1080p50
480p
1080p60
svsp_m_p2i_vid
17
31
2
16
The PVSP PtoI does not have direct access to the data from the input pins but it can be utilized to convert a progressive input format to
interlaced using the PVSP core bypass path by setting the
3.2.3.16.
Automatic Contrast Enhancement
The Automatic Contrast Enhancement (ACE) block is used to intelligently enhance the contrast of the whole picture by making dark
regions darker and bright regions brighter. It is stable under scene changes as well as being robust in the presence of noise. ACE
supports both interlaced and progressive inputs and can be enabled/disabled using
ace_enable
, IO Map,
Address 0x1A30[7]
This bit is used to enable the automatic contrast enhancement (ACE) block.
Function
ace_enable
Description
0
Bypass A.C.E.
1
Enable A.C.E.
3.3.
SECONDARY VSP
3.3.1.
Introduction to SVSP
FFS
VIM
VOM
Secondary VSP
Input
Video
Output
Video
Write to
DDR2
Read from
DDR2
Progressive
to Interlaced
FFS
VIM
VOM
Secondary VSP
Input
Video
Output
Video
Write to
DDR2
Read from
DDR2
Progressive
to Interlaced
Figure 60: ADV8003 SVSP
shows the structure of the SVSP
.
The SVSP comprises of four sections; the VIM, the VOM, a controller which is the FFS, and a
PtoI converter.
Summary of Contents for ADV8003
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