ADV8003 Hardware Manual
Rev. B, August 2013
102
Function
exosd_ddr_yc_swap
Description
0
Y on rising edge of clock
1
C on rising edge of clock
exosd_ddr_edge_sel
, IO Map,
Address 0x1B6A[3]
This bit is used to select which edge the first sample of DDR data is latched on.
Function
exosd_ddr_edge_sel
Description
0
Posedge data first
1
Negedge data first
Using the pixel clock as a reference, ADV8003 expects the Y sample on a rising edge and then a chroma sample on the falling edge. When
is set, ADV8003 expects a chroma sample on the rising edge and the Y sample on the falling edge.
can be used to swap the order of the chroma data. By default, ADV8003 expects a sequence of Cb, Cr, Cb, Cr…
When
is set, ADV8003 expects a sequence of Cr, Cb, Cr, Cb....
exosd_swap_cb_cr_422
, IO Map,
Address 0x1B69[7]
This bit is used to swap the order of the C data when decoding 4:2:2 data.
Function
exosd_swap_cb_cr_422
Description
0
Cb/Cr decoding
1
Cr/Cb decoding
is used to convert from pseudo 444 video data to real 444. All processing occurs in the ADV8003 in 4:4:4 mode.
Therefore, if video input to the device is not in this format, it must be first converted to 4:4:4. Setting this bit to 1 converts video data to
4:4:4.
exosd_ps444_r444_conv
, IO Map,
Address 0x1B69[6]
This bit is used to convert 4:2:2 data to pseudo 444 or to real 444.
Function
exosd_ps444_r444_con
v
Description
0
Nothing done.
1
Pseudo444 to Real 444 conversion.
is used to reverse the order of the video TTL input. By default, this is set to non reversed.
exosd_rev_bus
, IO Map,
Address 0x1B6B[4]
This bit is used to reverse the input video bus, i.e. D[23:0] -> D[0:23].
Function
exosd_rev_bus
Description
0
Reverse the pin mapping on the OSD bus
1
Use the OSD bus as it comes from the pins
configure the polarity of the input video timing signals. These must be set depending on
Summary of Contents for ADV8003
Page 366: ...ADV8003 Hardware Manual Rev B August 2013 366 Figure 144 ADV8003 Schematic Page 4...
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