ADV8003 Hardware Manual
Rev. B, August 2013
173
This register sets half the width of the output frame which is to be scaled normally. By default, this register is set to 0 which means that
all the input frame will be stretched. It is, therefore, recommended that this register is set by the user before enabling the panorama
function.
Function
m_scaler_panorama_po
s[11:0]
Description
0x000
Default
0xXXX
Width of not-stretched image
3.2.3.13.
Output Port
This section details the configuration registers for the final block of the PVSP VOM. The primary purpose of the output port is to generate
the output video timing and output the video data. Refer to
for the register settings for the common CEA video formats that are
supported by the ADV8003. The output setting can be automatically configured using the setting of
. If the
output configuration needs to be set manually,
must be set to 1 and
set to 0. Refer to
When using manual configuration of the output timing format,
needs to be manually enabled when outputting
4k x 2k series timings and should be disabled for other timing formats.
If a limited range of output must be provided,
should be enabled. Otherwise, this register should be disabled. A
limited range indicates the output is clipped to 16-235 range for each data channel of pixel.
pvsp_dp_4kx2k_mode_en
, Primary VSP Map,
Address 0xE869[4]
This bit is used to make the VOM display module work in 4K x 2K mode. This register's value will be used while
pvsp_autocfg_output_vid is 0.
Function
pvsp_dp_4kx2k_mode_
en
Description
0
Not in 4K x 2K mode
1
In 4K x 2K mode
pvsp_data_clipping_en
, Primary VSP Map,
Address 0xE84E[3]
This bit is used to limit the output data within range of 16 to 235.
Function
pvsp_data_clipping_en
Description
0
Not limit output data
1
Limit output data
pvsp_man_dp_timing_enable
, Primary VSP Map,
Address 0xE883[0]
This bit is used to enable the manual setting of the display port's timing.
Summary of Contents for ADV8003
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