ADV8003 Hardware Manual
Rev. B, August 2013
201
Function
svsp_dp_output_blank
Description
0
Not output default color
1
Output default color
3.3.3.4.
DDR Bypass Mode
In the case where the SVSP is being used to upscale or downscale between 1080p and 720p, external DDR2 memory is not required.
Internal line buffers allow the user to convert between these two resolutions while maintaining the full external memory bandwidth for
both the PVSP and OSD. The DDR bypass mode provided in the SVSP can be manually enabled/disabled using
. DDR2
bypass mode can be automatically configured using
. If the DDR bypass
mode is to be set manually,
Note:
This option is only available to the user when scaling between two resolutions which have the same frame rate.
svsp_man_set_ddr_bypass
, Secondary VSP Map,
Address 0xE662[0]
This bit is used to enable manually setting DDR bypass. If this bit is set to 1, SVSP will bypass DDR while svsp_ddr_bypass is 1, or not
bypass DDR while svsp_ddr_bypass is 0.
Function
svsp_man_set_ddr_byp
ass
Description
0
Disable
1
Enable
svsp_ddr_bypass
, Secondary VSP Map,
Address 0xE649[7]
This bit is used to bypass external memory. This register's value will be used while svsp_man_set_ddr_bypass is 1.
Function
svsp_ddr_bypass
Description
0
Not bypass external memory
1
Bypass external memory
3.3.3.5.
Progressive to Interlaced Converter in SVSP
The PtoI converter block in the SVSP is used to convert progressive video to interlaced video. It drops odd or even lines of the progressive
video based on the output interlaced video field signal. Support is limited to 480p and 576p. The associated interlaced timing signals can
be generated in the PtoI hardware block.
The PtoI converter in the SVSP cannot operate in standalone mode – it must be connected to the SVSP.
The PtoI hardware can be enabled using
svsp_p2i_enable
, Secondary VSP Map,
Address 0xE649[5]
This bit is used to enable the PtoI in Secondary VSP.
Function
svsp_p2i_enable
Description
0
Disable
1
Enable
Summary of Contents for ADV8003
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