ADV8003 Hardware Manual
Rev. B, August 2013
93
osd_dout_drv_str
, IO Map,
Address 0x1BA3H
'This signal is used to control the drive strength for the video output data and sync signals.
Function
osd_dout_drv_str r
Description
00
Minimum
01
Medium low (x2)
10
Medium high (x3)
11
High (x4)
2.2.2.4.
Serial Video Rx
The Serial Video Rx can only be connected to the RX input channel (see
Section
2.2.2.5.
Primary Input Channel
The ADV8003 primary input channel incorporates an input formatter, CSC, updither block and ACE control.
The input formatter provides a number of controls to configure what data the video TTL input channel is configured for. The video TTL
input channel must be connected to either the video TTL input pins, the EXOSD TTL input pins or the high speed TTL input pins using
. If the primary input channel is connected to the video TTL input pins, the format and bit width of the data, for
example, 2 x 8 bit buses of 4:2:2 data, must be specified using
can be used to indicate which
input pins are used to carry the upper, middle and lower ranges of bits (for example, upper = D[35:25], middle = D[24:12], lower =
D[11:0] or upper = D[11:0], middle = D[35:25], lower = D[24:12]).
p_inp_chan_sel[1:0]
, IO Map,
Address 0x1A07[1:0]
This signal is used to select the input for the Primary Input Channel.
Function
p_inp_chan_sel[1:0]
Description
00
Video TTL input (P[35:0])
01
EXOSD TTL Input (OSD_IN[23:0])
10
48-bit TTL input (OSD_IN[11:0] and P[35:0]) for 3GHz interleaved TTL
11
Reserved
vid_format_sel[4:0]
, IO Map,
Address 0x1B48[4:0]
This signal is used to select the input format for the video data.
Summary of Contents for ADV8003
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